Patents by Inventor RAJENDRAKUMAR JOISH

RAJENDRAKUMAR JOISH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9595937
    Abstract: Disclosed examples include a programmable attenuator circuit providing selective cross coupling of impedance components between circuit input nodes and output nodes according to control signals to set or adjust an attenuation value of the attenuator circuit. The attenuator circuit includes a plurality of attenuator impedance components, and a switching circuit to selectively connect at least a first attenuator impedance component between the first input node and the second output node, to selectively connect at least a second attenuator impedance component between the second input node and the first output node, to selectively connect a third attenuator impedance component between the first input node and the first output node, and to selectively connect a fourth attenuator impedance component between the second input node and the second output node.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: March 14, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Rajendrakumar Joish
  • Publication number: 20160373079
    Abstract: The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input. A second transistor receives a second input. A plurality of impedance networks is coupled between the first transistor and the second transistor. At least one impedance network of the plurality of impedance networks includes a first impedance path and a second impedance path. The first impedance path is activated during single ended operation, and the second impedance path is activated during differential operation.
    Type: Application
    Filed: September 1, 2016
    Publication date: December 22, 2016
    Inventor: Rajendrakumar Joish
  • Patent number: 9294116
    Abstract: A circuit includes an amplifier circuit that receives a residue voltage from an output capacitor connected to an output of a digital to analog converter (DAC). The DAC is employed in a pipeline stage of an analog to digital converter (ADC). The amplifier circuit provides a scaled output voltage based on the residue voltage. A sample circuit samples the scaled output voltage during a first portion of a hold phase of the DAC. A discharge circuit supplies the sampled scaled output voltage to the output of the DAC during a second portion of the hold phase of the DAC to mitigate settling time of the DAC.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: March 22, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Rajendrakumar Joish
  • Publication number: 20160079925
    Abstract: The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input and generates a first load current. A first output node is coupled to a power supply through a first load resistor. The first load resistor receives the first load current. A first capacitor network is coupled to the first output node and draws a first capacitive current from the first output node. A first current buffer is coupled between the first output node and the first transistor. A current through the first current buffer is a summation of the first load current and the first capacitive current.
    Type: Application
    Filed: September 11, 2015
    Publication date: March 17, 2016
    Inventor: Rajendrakumar JOISH
  • Publication number: 20160079959
    Abstract: Disclosed examples include a programmable attenuator circuit providing selective cross coupling of impedance components between circuit input nodes and output nodes according to control signals to set or adjust an attenuation value of the attenuator circuit. The attenuator circuit includes a plurality of attenuator impedance components, and a switching circuit to selectively connect at least a first attenuator impedance component between the first input node and the second output node, to selectively connect at least a second attenuator impedance component between the second input node and the first output node, to selectively connect a third attenuator impedance component between the first input node and the first output node, and to selectively connect a fourth attenuator impedance component between the second input node and the second output node.
    Type: Application
    Filed: September 15, 2015
    Publication date: March 17, 2016
    Applicant: Texas Instruments Incorporated
    Inventor: Rajendrakumar Joish
  • Publication number: 20160079949
    Abstract: A programmable (multistep) resistor attenuator includes distortion cancellation for harmonic distortion currents. The attenuator includes at last one attenuation stage coupled between a signal input node and a virtual ground node (such as an input to a differential amplifier). The attenuation node is: (a) coupled to the input node through a resistor R; (b) coupled to the virtual ground node through a resistor kR and a virtual ground switch Swf with an on resistance Rswf; and (c) coupled to a differential ground through a resistor mR and a differential ground switch Swp with an on resistance Rswp. Swp is sized relative to Swf such that, when both Swp and Swf are conducting, a component Ipnf of a current Ipn through Rswp and mR to the attenuation node and branching into kR and Rswf, matches, in phase and magnitude, a harmonic current Ifn from the virtual ground through Rswf and kR to the attenuation node, thereby substantially canceling the harmonic distortion appearing at the virtual ground.
    Type: Application
    Filed: September 17, 2015
    Publication date: March 17, 2016
    Inventor: Rajendrakumar Joish
  • Publication number: 20160079945
    Abstract: The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input. A second transistor receives a second input. A plurality of impedance networks is coupled between the first transistor and the second transistor. At least one impedance network of the plurality of impedance networks includes a first impedance path and a second impedance path. The first impedance path is activated during single ended operation, and the second impedance path is activated during differential operation.
    Type: Application
    Filed: September 2, 2015
    Publication date: March 17, 2016
    Inventor: Rajendrakumar JOISH
  • Publication number: 20150263757
    Abstract: A circuit includes an amplifier circuit that receives a residue voltage from an output capacitor connected to an output of a digital to analog converter (DAC). The DAC is employed in a pipeline stage of an analog to digital converter (ADC). The amplifier circuit provides a scaled output voltage based on the residue voltage. A sample circuit samples the scaled output voltage during a first portion of a hold phase of the DAC. A discharge circuit supplies the sampled scaled output voltage to the output of the DAC during a second portion of the hold phase of the DAC to mitigate settling time of the DAC.
    Type: Application
    Filed: March 10, 2015
    Publication date: September 17, 2015
    Inventor: RAJENDRAKUMAR JOISH