Patents by Inventor Rajesh Karri
Rajesh Karri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11942866Abstract: An error amplifier includes an output pin coupled to a pulse width modulation (PWM) comparator of a buck-boost converter. A first transconductance amplifier adjusts an output current at the output pin and operates in a constant voltage mode. The first transconductance amplifier includes a first positive input to receive a first voltage reference and a first negative input coupled to a tap point of a voltage divider coupled between a voltage bus and a ground of the buck-boost converter. A second transconductance amplifier also adjusts the output current at the output pin and operates in a constant current mode. The second transconductance amplifier includes a second positive input to receive a second voltage reference and a second negative input coupled to a current sense amplifier, the current sense amplifier being coupled to a sense resistor positioned inline along the voltage bus.Type: GrantFiled: July 21, 2021Date of Patent: March 26, 2024Assignee: Cypress Semiconductor CorporationInventors: Rajesh Karri, Arun Khamesra
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Publication number: 20240048053Abstract: In an example embodiment, a method comprising identifying, by a primary-side controlled Universal Serial Bus Power Delivery (USB-PD) alternating current to direct current (AC-DC) converter, a first pulse, wherein the first pulse is received from a pulse transformer. The method further includes determining that a threshold duration of time is satisfied. In response to determining that the threshold duration of time is satisfied, the method includes identifying a second pulse, wherein the second pulse is received from the pulse transformer. The first pulse and the second pulse are used for control of a high-side field effect transistor (FET) and a low-side FET, where the high-side FET is coupled to an active clamp flyback (ACF) circuit and the low-side FET is coupled to a flyback transformer of the USB-PD AC-DC converter. In response to identifying the second pulse, the method further includes controlling operation of the high-side FET or the low-side FET.Type: ApplicationFiled: June 9, 2023Publication date: February 8, 2024Applicant: Cypress Semiconductor CorporationInventors: Soon Hwei TAN, Rajesh KARRI, Hung-Chun CHEN
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Patent number: 11870363Abstract: A secondary side controller for a flyback converter includes an integrated circuit (IC), which in turn includes: a synchronous rectifier (SR) sense pin coupled to a drain of an SR transistor on a secondary side of the flyback converter; a capacitor having a first side coupled to the SR sense pin, the capacitor to charge or discharge responsive to a voltage sensed at the SR sense pin; a diode-connected transistor coupled between a second side of the capacitor and ground; a first current mirror coupled to the diode-connected transistor and configured to receive, as input current, a reference current from a variable current source; and a peak detect transistor coupled to the diode-connected transistor and to an output of the first current mirror. The peak detect transistor is to output a peak detection signal in response to detecting current from the capacitor drop below the reference current.Type: GrantFiled: January 14, 2022Date of Patent: January 9, 2024Assignee: Cypress Semiconductor CorporationInventors: Saravanan Virunjipuram Murugesan, Rajesh Karri, Arun Khamesra, Hariom Rai
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Publication number: 20230291314Abstract: A mode-transition architecture for USB controllers is described herein. In an example embodiment, an integrated circuit (IC) controller includes a controller coupled to a slope compensation circuit, the controller to detect a transition of a buck-boost converter from a first mode having a first duty cycle to a second mode having a second duty cycle that is less or more than the first duty cycle. The controller controls the slope compensation circuit to nullify an error in an output caused by the transition. The controller can cause the slope compensation circuit to apply a charge stored in a capacitor during a first cycle to start a second cycle with a higher voltage than the first cycle.Type: ApplicationFiled: May 1, 2023Publication date: September 14, 2023Applicant: Cypress Semiconductor CorporationInventors: Rajesh Karri, Arun Khamesra, Pulkit Shah, Hariom Rai
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Publication number: 20230231483Abstract: A secondary side controller for a flyback converter includes an integrated circuit (IC), which in turn includes: a synchronous rectifier (SR) sense pin coupled to a drain of an SR transistor on a secondary side of the flyback converter; a capacitor having a first side coupled to the SR sense pin, the capacitor to charge or discharge responsive to a voltage sensed at the SR sense pin; a diode-connected transistor coupled between a second side of the capacitor and ground; a first current mirror coupled to the diode-connected transistor and configured to receive, as input current, a reference current from a variable current source; and a peak detect transistor coupled to the diode-connected transistor and to an output of the first current mirror. The peak detect transistor is to output a peak detection signal in response to detecting current from the capacitor drop below the reference current.Type: ApplicationFiled: January 14, 2022Publication date: July 20, 2023Applicant: Cypress Semiconductor CorporationInventors: Saravanan VIRUNJIPURAM MURUGESAN, Rajesh KARRI, Arun KHAMESRA, Hariom RAI
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Patent number: 11671013Abstract: An IC controller for USB Type-C device includes an error amplifier (EA), which includes an EA output coupled to a PWM comparator of a buck-boost converter; a first transconductance amplifier to adjust a current at the EA output, the first transconductance amplifier operating in a constant voltage mode; and a second transconductance amplifier to adjust the current at the EA output, the second transconductance amplifier operating in a constant current mode. A first set of programmable registers is to store a first set of increasingly higher transconductance values. A second set of programmable registers is to store a second set of increasingly higher transconductance values. Control logic is to: cause the first transconductance amplifier to operate while sequentially using transconductance values stored in the first set of programmable registers; and cause the second transconductance amplifier to operate while sequentially using transconductance values stored in the second set of programmable registers.Type: GrantFiled: August 31, 2021Date of Patent: June 6, 2023Assignee: Cypress Semiconductor CorporationInventors: Arun Khamesra, Hariom Rai, Rajesh Karri, Pulkit Shah
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Patent number: 11658574Abstract: An IC controller for a USB Type-C device includes a register that is programmable to store a pulse width and a frequency. A buck-boost converter of the controller includes a first high-side switch and a second high-side switch. Control logic is coupled to the register and gates of the first/second high-side switches. To perform a soft start in one of buck mode or boost mode, the control logic: causes the second high-side switch to operate in diode mode; retrieves values of the pulse width and the frequency from the register; causes the first high-side switch to turn on using pulses having the pulse width and at the frequency; detects an output voltage at the output terminal of the buck-boost converter that exceeds a threshold value; and in response to the detection, transfers control of the buck-boost converter to an error amplifier loop coupled to the control logic.Type: GrantFiled: May 6, 2021Date of Patent: May 23, 2023Assignee: Cypress Semiconductor CorporationInventors: Hariom Rai, Pulkit Shah, Arun Khamesra, Rajesh Karri, Praveen Suresh
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Patent number: 11658573Abstract: A mode-transition architecture for USB controllers is described herein. In an example embodiment, an integrated circuit (IC) controller includes a controller coupled to a slope compensation circuit, the controller to detect a transition of a buck-boost converter from a first mode having a first duty cycle to a second mode having a second duty cycle that is less or more than the first duty cycle. The controller controls the slope compensation circuit to nullify an error in an output caused by the transition. The controller can cause the slope compensation circuit to apply a charge stored in a capacitor during a first cycle to start a second cycle with a higher voltage than the first cycle.Type: GrantFiled: January 13, 2021Date of Patent: May 23, 2023Assignee: Cypress Semiconductor CorporationInventors: Rajesh Karri, Arun Khamesra, Pulkit Shah, Hariom Rai
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Patent number: 11606042Abstract: A secondary side controller of a flyback AC-DC converter includes an integrated circuit, which includes: an analog-to-digital converter (ADC) coupled to a voltage bus (VBUS), the ADC to output a digital value corresponding to a voltage level of the VBUS; first logic configured to generate a reference voltage based on the digital value; second logic configured to generate a VBUS gain value based on output power of a flyback transformer of the flyback AC-DC converter; an integrator to accumulate current corresponding to a sensed voltage at a drain of a synchronous rectifier (SR) of a secondary side of the flyback transformer, the accumulated current to be modified according to the VBUS gain value, wherein the integrator outputs an updated sensed voltage; and a comparator to output a detection signal, indicative of a negative sense voltage, in response to the updated sensed voltage matching the reference voltage.Type: GrantFiled: January 14, 2022Date of Patent: March 14, 2023Assignee: Cypress Semiconductor CorporationInventors: Partha Mondal, Rajesh Karri, Hariom Rai
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Patent number: 11527957Abstract: A mode-transition architecture for USB Type-C controllers is described herein. In an example embodiment, an integrated circuit (IC) controller includes controller includes a controller coupled to a slope compensation circuit, the controller to cause the slope compensation circuit to apply a first slope compensation to the input current in a first mode in which the buck-boost converter is operating in a discontinuous conduction mode (DCM). The controller detects a transition of the buck-boost converter from a first mode having a first duty cycle to a second mode and causes the slope compensation circuit to apply a second slope compensation to the input current. The second slope compensation starts at a maximum offset of the first slope compensation.Type: GrantFiled: January 13, 2021Date of Patent: December 13, 2022Assignee: Cypress Semiconductor CorporationInventors: Rajesh Karri, Arun Khamesra, Pulkit Shah, Hariom Rai
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Publication number: 20220069713Abstract: An IC controller for USB Type-C device includes an error amplifier (EA), which includes an EA output coupled to a PWM comparator of a buck-boost converter; a first transconductance amplifier to adjust a current at the EA output, the first transconductance amplifier operating in a constant voltage mode; and a second transconductance amplifier to adjust the current at the EA output, the second transconductance amplifier operating in a constant current mode. A first set of programmable registers is to store a first set of increasingly higher transconductance values. A second set of programmable registers is to store a second set of increasingly higher transconductance values. Control logic is to: cause the first transconductance amplifier to operate while sequentially using transconductance values stored in the first set of programmable registers; and cause the second transconductance amplifier to operate while sequentially using transconductance values stored in the second set of programmable registers.Type: ApplicationFiled: August 31, 2021Publication date: March 3, 2022Applicant: Cypress Semiconductor CorporationInventors: Arun Khamesra, Hariom Rai, Rajesh Karri, Pulkit Shah
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Publication number: 20220069711Abstract: An error amplifier includes an output pin coupled to a pulse width modulation (PWM) comparator of a buck-boost converter. A first transconductance amplifier adjusts an output current at the output pin and operates in a constant voltage mode. The first transconductance amplifier includes a first positive input to receive a first voltage reference and a first negative input coupled to a tap point of a voltage divider coupled between a voltage bus and a ground of the buck-boost converter. A second transconductance amplifier also adjusts the output current at the output pin and operates in a constant current mode. The second transconductance amplifier includes a second positive input to receive a second voltage reference and a second negative input coupled to a current sense amplifier, the current sense amplifier being coupled to a sense resistor positioned inline along the voltage bus.Type: ApplicationFiled: July 21, 2021Publication date: March 3, 2022Applicant: Cypress Semiconductor CorporationInventors: Rajesh Karri, Arun Khamesra
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Publication number: 20220069562Abstract: A Universal Serial Bus controller including a Vconn switch having a current controlled architecture, and method for operating the same are provided. Generally, the Vconn switch includes first and second transistors coupled in series between a Vconn terminal and a communication channel (CC) terminal, a replica switch including a source coupled to the Vconn terminal, a replica current generator including a first input coupled to a drain of the replica switch and a second input coupled to a drain of the first transistor, and a resistance control module coupled to an output of the replica current generator and including an output coupled to a gate of the second transistor. The replica current generator is operable to match a current through the replica switch to that supplied through the first and second transistors to the CC terminal, and the resistance control module is operable to control resistance of the Vconn switch.Type: ApplicationFiled: May 20, 2021Publication date: March 3, 2022Applicant: Infineon Technologies LLCInventors: Rajesh Karri, Arun Khamesra
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Publication number: 20220069715Abstract: A mode-transition architecture for USB Type-C controllers is described herein. In an example embodiment, an integrated circuit (IC) controller includes controller includes a controller coupled to a slope compensation circuit, the controller to cause the slope compensation circuit to apply a first slope compensation to the input current in a first mode in which the buck-boost converter is operating in a discontinuous conduction mode (DCM). The controller detects a transition of the buck-boost converter from a first mode having a first duty cycle to a second mode and causes the slope compensation circuit to apply a second slope compensation to the input current. The second slope compensation starts at a maximum offset of the first slope compensation.Type: ApplicationFiled: January 13, 2021Publication date: March 3, 2022Applicant: Cypress Semiconductor CorporationInventors: Rajesh Karri, Arun Khamesra, Pulkit Shah, Hariom Rai
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Publication number: 20220069708Abstract: A mode-transition architecture for USB controllers is described herein. In an example embodiment, an integrated circuit (IC) controller includes a controller coupled to a slope compensation circuit, the controller to detect a transition of a buck-boost converter from a first mode having a first duty cycle to a second mode having a second duty cycle that is less or more than the first duty cycle. The controller controls the slope compensation circuit to nullify an error in an output caused by the transition. The controller can cause the slope compensation circuit to apply a charge stored in a capacitor during a first cycle to start a second cycle with a higher voltage than the first cycle.Type: ApplicationFiled: January 13, 2021Publication date: March 3, 2022Applicant: Cypress Semiconductor CorporationInventors: Rajesh Karri, Arun Khamesra, Pulkit Shah, Hariom Rai