Patents by Inventor Rajesh KEMISETTI

Rajesh KEMISETTI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230368325
    Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for optimizing power and performance of XR workloads. A graphics processor may receive, from an application, an indication of a time period for a timer associated with exiting an IFPC state. The graphics processor may process, upon triggering the timer associated with exiting the IFPC state, one or more predefined workloads. The graphics processor may initiate the IFPC state upon the one or more predefined workloads being finished processing. The graphics processor may exit the IFPC state upon detecting an expiration of the timer.
    Type: Application
    Filed: May 16, 2022
    Publication date: November 16, 2023
    Inventors: Rajesh KEMISETTI, Puranam V G TEJASWI, Kamal AGRAWAL
  • Patent number: 11372756
    Abstract: Adding, by a memory management process executing in a computing device, a physical address of each of a plurality of available blocks of memory to a binary search tree based on the physical address. After the adding, receiving, by the memory management process, a request for a memory allocation, the memory allocation to be from the plurality of available blocks. Allocating, by the memory management process and in response to the request, blocks of memory in physical address order from the binary search tree.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: June 28, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Rajesh Kemisetti, Joseph Gee, Rex Perkins, Surendra Nallam
  • Publication number: 20220083464
    Abstract: Adding, by a memory management process executing in a computing device, a physical address of each of a plurality of available blocks of memory to a binary search tree based on the physical address. After the adding, receiving, by the memory management process, a request for a memory allocation, the memory allocation to be from the plurality of available blocks. Allocating, by the memory management process and in response to the request, blocks of memory in physical address order from the binary search tree.
    Type: Application
    Filed: September 17, 2020
    Publication date: March 17, 2022
    Inventors: Rajesh KEMISETTI, Joseph GEE, Rex PERKINS, Surendra NALLAM