Patents by Inventor Rajesh Patil

Rajesh Patil has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9882843
    Abstract: A computer-implemented method, carried out by one or more processors, for managing unavailability notices. In an embodiment, the method comprises the steps of initializing an out of office notice, wherein the out of office notice is associated with a first user of an e-mail service; receiving inputs for the out of office notice, wherein the inputs include one or more of: a duration of time selection, alternative contact information, and message content; receiving a list of one or more user to whom to send an out of office alert notice; and sending to the one or more users from the list the out of office alert notice with a reminder function, wherein the reminder function allows for each of the one or more users to receive a reminder about unavailability at another time.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: January 30, 2018
    Assignee: International Business Machines Corporation
    Inventors: Supreet K. Bhatia, Girish Padmanabhan, Rajesh Patil, Prasad P. Purandare, Hina Purohit, Paryushan P. Sarsamkar, Jaitirth V. Shirole
  • Publication number: 20170132569
    Abstract: Onboarding for a new user may be conducted when a system detects a user profile and a role profile, where the role profile is associated with a particular job role within a company. The system may gather learning data about what the user is learning during the onboarding, and send the data to a natural language processing system for analysis. Based on the analysis and the user and role profiles, a next set of onboarding materials may be determined by the system. Based on the next set of onboarding materials and the learning data, the role profile can be updated.
    Type: Application
    Filed: November 11, 2015
    Publication date: May 11, 2017
    Inventors: Prabhuranjan Parhi, Rajesh Patil, Saraswathi S. Perumalla
  • Publication number: 20160337273
    Abstract: A computer-implemented method, carried out by one or more processors, for managing unavailability notices. In an embodiment, the method comprises the steps of initializing an out of office notice, wherein the out of office notice is associated with a first user of an e-mail service; receiving inputs for the out of office notice, wherein the inputs include one or more of: a duration of time selection, alternative contact information, and message content; receiving a list of one or more user to whom to send an out of office alert notice; and sending to the one or more users from the list the out of office alert notice with a reminder function, wherein the reminder function allows for each of the one or more users to receive a reminder about unavailability at another time.
    Type: Application
    Filed: July 27, 2016
    Publication date: November 17, 2016
    Inventors: Supreet K. Bhatia, Girish Padmanabhan, Rajesh Patil, Prasad P. Purandare, Hina Purohit, Paryushan P. Sarsamkar, Jaitirth V. Shirole
  • Patent number: 9467400
    Abstract: A computer-implemented method, carried out by one or more processors, for managing unavailability notices. In an embodiment, the method comprises the steps of initializing an out of office notice, wherein the out of office notice is associated with a first user of an e-mail service; receiving inputs for the out of office notice, wherein the inputs include one or more of: a duration of time selection, alternative contact information, and message content; receiving a list of one or more user to whom to send an out of office alert notice with the received inputs; and sending to the one or more users from the list the out of office alert notice with the received inputs and a reminder function, wherein the reminder function allows for each of the one or more users to receive a reminder about unavailability at another time.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: October 11, 2016
    Assignee: International Business Machines Corporation
    Inventors: Supreet K. Bhatia, Girish Padmanabhan, Rajesh Patil, Prasad P. Purandare, Hina Purohit, Paryushan P. Sarsamkar, Jaitirth V. Shirole
  • Publication number: 20150381532
    Abstract: A computer-implemented method, carried out by one or more processors, for managing unavailability notices. In an embodiment, the method comprises the steps of initializing an out of office notice, wherein the out of office notice is associated with a first user of an e-mail service; receiving inputs for the out of office notice, wherein the inputs include one or more of: a duration of time selection, alternative contact information, and message content; receiving a list of one or more user to whom to send an out of office alert notice with the received inputs; and sending to the one or more users from the list the out of office alert notice with the received inputs and a reminder function, wherein the reminder function allows for each of the one or more users to receive a reminder about unavailability at another time.
    Type: Application
    Filed: June 27, 2014
    Publication date: December 31, 2015
    Inventors: Supreet K. Bhatia, Girish Padmanabhan, Rajesh Patil, Prasad P. Purandare, Hina Purohit, Paryushan P. Sarsamkar, Jaitirth V. Shirole
  • Publication number: 20150278763
    Abstract: Receiving items of work from various sources, applying analytics to obtain metadata about the items of work, and then applying further analytics to classify each item of work into one or more work domains in a model of work. User feedback is received regarding the accuracy of the classification decisions, and the computer-based classification analytics are updated accordingly.
    Type: Application
    Filed: March 26, 2014
    Publication date: October 1, 2015
    Applicant: International Business Machines Corporation
    Inventors: Rajesh Patil, Fernando Salazar
  • Publication number: 20150278764
    Abstract: Receiving items of work from various sources, applying analytics to obtain metadata about the items of work, and then applying further analytics to classify each item of work into one or more work domains in a model of work. User feedback is received regarding the accuracy of the classification decisions, and the computer-based classification analytics are updated accordingly.
    Type: Application
    Filed: February 17, 2015
    Publication date: October 1, 2015
    Inventors: Rajesh Patil, Fernando Salazar
  • Publication number: 20150056985
    Abstract: In various aspects, the disclosure provides the capability for a UE to implement a partial PLMN scan, providing quick results to a user's request for a manual PLMN scan, in a way that is expedited relative to the conventional method of providing PLMN results only when a full scan is completed. In further aspects, the disclosure provides for various optimizations to expedite a PLMN scan, which may be implemented either with the partial PLMN scan, or in a full PLMN scan, to further expedite the provision of PLMN scan results to the user.
    Type: Application
    Filed: March 28, 2014
    Publication date: February 26, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Arvind Swaminathan, Rajesh Patil, Shivank Nayak, Chih-Ping Hsu, Reza Shahidi, Mingyan Wang
  • Publication number: 20130078940
    Abstract: Embodiments of the present invention enable and facilitate radio access technology based call control. For example, a method for call control is described. A call request that includes a call number is received. A call type of the call request is identified based on the call number. A radio access technology associated with the call number and the call type is determined. A call is performed using the radio access technology associated with the call number and the call type. In some instances, embodiments can be used for emergency type calls. Other aspects, embodiments, and features are also claimed and described.
    Type: Application
    Filed: September 24, 2012
    Publication date: March 28, 2013
    Inventors: Rajesh Patil, Asimava Bera, Krishna Chaitanya Pinnaka, Ramji Grandhi, Ravichandra Soordelu
  • Publication number: 20100151035
    Abstract: The present invention relates to a stable pharmaceutical composition of a poorly water-soluble drug with a view to increasing its solubility and bioavailability. The present invention relates to a solid dispersion of a poorly water-soluble drug.
    Type: Application
    Filed: March 10, 2008
    Publication date: June 17, 2010
    Applicant: Sandoz AG
    Inventors: Bharatrajan Ramaswami, Manisha Rajesh Patil, Aditi Das
  • Patent number: 7680097
    Abstract: A network switch having a hybrid switch architecture, which is scalable to increase connectivity, buffering, and bandwidth by using multiple shared-memory switch fabrics and multiple crossbar switch fabrics. Each of the crossbar switch fabrics is coupled to each of the shared-memory switch fabrics. The shared-memory switch fabrics are configured to store and retrieve packets. The crossbar switch fabrics are configured to distribute and recollect packets to and from each of the shared-memory switch fabrics. The network switch having a hybrid switch architecture distributes packets from a crossbar switch fabric to the multiple shared-memory switch fabrics to share the distributed packets among the multiple shared-memory switch fabrics.
    Type: Grant
    Filed: February 28, 2006
    Date of Patent: March 16, 2010
    Assignee: Cisco Technology, Inc.
    Inventors: Adam Goldstein, David Smith, Harish Devanagondi, Hugh Barrass, Kamran Torabi, Rajesh Patil
  • Patent number: 7529908
    Abstract: A system, method and tangible medium for unified exception handling with distributed exception identification includes a packet processing pipeline with at least two processing stages for processing data packets, each of the data packets being processed having an associated exception map in a memory of the apparatus. An exception detector at each processing stage detects whether any exception conditions apply to the data packet at the processing stage, and if so, a bit setter sets, modifies, or resets one or more bits in the exception map associated with exception conditions detected at the processing stage. An exception handler processes the exception map in response to the state of in the exception map after all the processing stages are complete.
    Type: Grant
    Filed: May 9, 2006
    Date of Patent: May 5, 2009
    Assignee: Cisco Technology, INc.
    Inventors: Harish R. Devanagondi, Rajesh Patil, Sanjeev Mahalawat, Jianyong Sun
  • Patent number: 7464254
    Abstract: A rule processor and method for using the same are disclosed. In one embodiment, the rule processor comprises a general purpose register file, an instruction sequencer to provide instructions, a decoder coupled to the general purpose register file to decode a set of instructions specified by the instruction sequencer, and a state machine unit coupled to the decoder and having state machine registers to store one or more state machines and state machine execution hardware coupled to the state machine registers to evaluate the one or more state machines in response to executing one or more of the set of instructions and based on information from one or both of the decoder and the general purpose register file.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: December 9, 2008
    Assignee: Cisco Technology, Inc.
    Inventors: Harshvardhan Sharangpani, Manoj Khare, Kent Fielden, Rajesh Patil, Judge Kennedy Arora
  • Patent number: 7451143
    Abstract: A method and apparatus is disclosed herein for a rule processor for conducting contextual searches, the processor comprising a plurality of input payload search registers, search execution engine coupled to the plurality of search registers to perform one or more contextual searches on content in the search registers by via parallel pattern matching in response to executing rules specifying the one or more searches, and presenting one or more patterns to the content in the search registers.
    Type: Grant
    Filed: August 27, 2003
    Date of Patent: November 11, 2008
    Assignee: Cisco Technology, Inc.
    Inventors: Harshvardhan Sharangpani, Rajesh Patil
  • Publication number: 20060206620
    Abstract: A system, method and tangible medium for unified exception handling with distributed exception identification includes a packet processing pipeline with at least two processing stages for processing data packets, each of the data packets being processed having an associated exception map in a memory of the apparatus. An exception detector at each processing stage detects whether any exception conditions apply to the data packet at the processing stage, and if so, a bit setter sets, modifies, or resets one or more bits in the exception map associated with exception conditions detected at the processing stage. An exception handler processes the exception map in response to the state of in the exception map after all the processing stages are complete.
    Type: Application
    Filed: May 9, 2006
    Publication date: September 14, 2006
    Applicant: Cisco Technology, Inc.
    Inventors: Harish Devanagondi, Rajesh Patil, Sanjeev Mahalawat, Jianyong Sun
  • Patent number: 7085918
    Abstract: Embodiments of the invention provide a programmable FSA building block, having a number of programmable registers and associated logic implemented therein, that provide the capability of contextually evaluating complex REs of arbitrary size against multiple data streams. Embodiments of the invention provide fully programmable hardware in which all of the states of an RE are instantiated and all of the states are fully connected. For one embodiment, the building blocks have a fixed number of states to facilitate implementation on a chip. For such an embodiment, an RE having an excessive number of states is implemented on two or more FSA building blocks and the FSA building blocks are then stitched together to effect evaluation of the RE. For one embodiment, two or more REs having a number of states less than the fixed number of states of a building block may be implemented with a single building block.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: August 1, 2006
    Assignee: Cisco Systems, Inc.
    Inventors: Harshvardan Sharangpani, Manoj Khare, Kent Fielden, Rajesh Patil, Judge Kennedy Arora
  • Patent number: 7079525
    Abstract: A network switch having a hybrid switch architecture, which is scalable to increase connectivity, buffering, and bandwidth by using multiple shared-memory switch fabrics and multiple crossbar switch fabrics. Each of the crossbar switch fabrics is coupled to each of the shared-memory switch fabrics. The shared-memory switch fabrics are configured to store and retrieve packets. The crossbar switch fabrics are configured to distribute and re-collect packets to and from each of the shared-memory switch fabrics. The network switch having a hybrid switch architecture distributes packets from a crossbar switch fabric to the multiple shared-memory switch fabrics to share the distributed packets among the multiple shared-memory switch fabrics.
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: July 18, 2006
    Assignee: Cisco Technology, Inc.
    Inventors: Adam Goldstein, David Smith, Harish Devanagondi, Hugh Barrass, Kamran Torabi, Rajesh Patil
  • Patent number: 7062641
    Abstract: Unified exception handling may be provided by processing a data packet through at least two pipelined processing stages in a data packet processor such as a switch, router, bridge, or similar network device, each of the data packets having associated with it (while it is being processed) an exception map disposed in a memory of the network device. The bits in the exception map are set, modified, or reset in response to exception conditions detected at the various processing stages. After the packet has been fully processed, an exception handler takes as an input the exception map and further processes the packet in response to the state of the exception map.
    Type: Grant
    Filed: January 10, 2001
    Date of Patent: June 13, 2006
    Assignee: Cisco Technology, Inc.
    Inventors: Harish R. Devanagondi, Rajesh Patil, Sanjeev Mahalawat, Jianyong Sun
  • Publication number: 20050012521
    Abstract: Embodiments of the invention provide a programmable FSA building block, having a number of programmable registers and associated logic implemented therein, that provide the capability of contextually evaluating complex REs of arbitrary size against multiple data streams. Embodiments of the invention provide fully programmable hardware in which all of the states of an RE are instantiated and all of the states are fully connected. For one embodiment, the building blocks have a fixed number of states to facilitate implementation on a chip. For such an embodiment, an RE having an excessive number of states is implemented on two or more FSA building blocks and the FSA building blocks are then stitched together to effect evaluation of the RE. For one embodiment, two or more REs having a number of states less than the fixed number of states of a building block may be implemented with a single building block.
    Type: Application
    Filed: January 8, 2004
    Publication date: January 20, 2005
    Inventors: Harshvardhan Sharangpani, Manoj Khare, Kent Fielden, Rajesh Patil, Judge Arora
  • Publication number: 20040215593
    Abstract: A rule processor and method for using the same are disclosed. In one embodiment, the rule processor comprises a general purpose register file, an instruction sequencer to provide instructions, a decoder coupled to the general purpose register file to decode a set of instructions specified by the instruction sequencer, and a state machine unit coupled to the decoder and having state machine registers to store one or more state machines and state machine execution hardware coupled to the state machine registers to evaluate the one or more state machines in response to executing one or more of the set of instructions and based on information from one or both of the decoder and the general purpose register file.
    Type: Application
    Filed: January 8, 2004
    Publication date: October 28, 2004
    Inventors: Harshvardhan Sharangpani, Manoj Khare, Kent Fielden, Rajesh Patil, Judge Kennedy Arora