Patents by Inventor Rajesh R. Berigei

Rajesh R. Berigei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7853908
    Abstract: An Algorithmic Reactive Testbench (ART) system is provided for the simulation/verification of an analog integrated circuit design. The ART system is a high level simulation/verification environment with a user program in which one or more analog testbenches are instantiated and operated as prescribed in an algorithmic reactive testbench program, and the properties of the unit testbenches (test objects) can be influenced by prior analysis of themselves or other tests. The test object may also contain various properties including information reflecting the status of the test object. The modification of a property of a test object is an act of communication in the ART system from the algorithmic reactive testbench program to the test object.
    Type: Grant
    Filed: September 5, 2007
    Date of Patent: December 14, 2010
    Assignee: National Semiconductor Corporation
    Inventors: Jang Dae Kim, Steve A. Martinez, Satya N. Mishra, Alan P. Bucholz, Hui X. Li, Rajesh R. Berigei
  • Patent number: 7558720
    Abstract: An automated method for checking electrostatic discharge (ESD) guidelines ensures that a sufficient number of ESD protection cells have been provided in the neighborhood of each pad in an integrated circuit design to ensure adequate current sinking and voltage clamping during the occurrence of an ESD event.
    Type: Grant
    Filed: January 9, 2006
    Date of Patent: July 7, 2009
    Assignee: National Semiconductor Corporation
    Inventors: Rajesh R. Berigei, Elroy Lucero, Sury Maturi, Marcel A. ter Beek
  • Publication number: 20090064063
    Abstract: An Algorithmic Reactive Testbench (ART) system is provided. The ART system is a high level verification environment with a user program in which on or more analog testbenches are instantiated and operated as prescribed in the program algorithm, and the properties of the unit testbenches (test objects) can be influenced by prior analysis of themselves or other tests. The results of the analysis may also affect the flow of the program itself. In the ART system, modification of the properties of a unit testbench occurs separately in the user program after definition of the unit testbench in the program (test object). A test object is a representation of a unit testbench along with its complete simulation setup and all associated data for the simulation. The test object may also contain various properties including information reflecting the status of the test object. The modification of a property of a test object is an act of communication in the ART system from the ART program to the test object.
    Type: Application
    Filed: September 5, 2007
    Publication date: March 5, 2009
    Inventors: Jang Dae Kim, Steve A. Martinez, Satya N. Mishra, Alan P. Bucholz, Hui X. Li, Rajesh R. Berigei