Abstract: The present invention relates to novel crystalline forms of the platelet aggregation inhibitor (+)-(S)-methyl-2-(2-chlorophenyl)-(6,7-dihydro-4H-thieno[3,2-c]pyrid-5-yl)acetate, clopidogrel (1), in the form of hydrogen bromide salts, identified as polymorph forms 1, 2 and 3. The present invention further relates to processes for preparing such forms, pharmaceutical compositions comprising such forms, and uses for such forms and compositions. The pharmaceutical compositions may be used, in particular, for inhibiting platelet aggregation or for treating, preventing or managing thrombosis, atherothrombosis, an atherothrombotic event, ischaemic stroke, myocardial infarction, non-Q-wave myocardial infarction, atherosclerosis, peripheral arterial disease, or unstable angina. The present invention also relates to methods of treating said disorders. Formula (1).

Abstract: Provided are compositions and methods for enhancing immune responses to an antigen. The compositions contain an isolated population of CD8+T cells and an inhibitor of mammalian target of rapamycin (mTOR). The method for obtaining an enhanced immune response to an antigen in an individual entails administering to the individual the antigen and an inhibitor of mammalian target of rapamycin (mTOR). CD8+T cells may also be used for adoptive cell transfer (ACT) therapy.

Abstract: The present invention relates to an efficient process for preparing an arylcyclopropanecarbonitrile, which involves the use of sulfolane as a solvent.

Abstract: A method forms a nonvolatile memory device using a semiconductor substrate. A charge storage layer is formed overlying the semiconductor substrate and a layer of gate material is formed overlying the charge storage layer to form a control gate electrode. A protective layer overlies the layer of gate material. Dopants are implanted into the semiconductor substrate and are self-aligned to the control gate electrode on at least one side of the control gate electrode to form a source and a drain in the semiconductor substrate on opposing sides of the control gate electrode. The protective layer prevents the dopants from penetrating into the control gate electrode. The protective layer that overlies the layer of gate material is removed. Electrical contact is made to the control gate electrode, the source and the drain. In one form a select gate is also provided in the memory device.

Abstract: The present invention pertains to a method and apparatus for obtaining filtered audiovisual content over a network for display on a television. In one embodiment, the method may include receiving a request for video content, the request including at least one factor that specifies an attribute of the requested video content, and communicating the request and the at least one factor to a content server. The method may also include receiving a response indicating video content available from the content server that satisfies the at least one factor. Furthermore, in one embodiment, the factor is data indicating a TV Parental Rating.

Abstract: A communication error message is displayed on a TV when an error is noted on a control data link between the TV and an Internet adapter module connected thereto.

Abstract: A multi-bit split-gate memory device is formed over a substrate. A storage layer is formed over the substrate. A first conductive layer is formed over the storage layer. A thickness of a portion of the conductive layer is removed to leave a pillar of the conductive layer and an area of reduced thickness of the conductive layer. A first sidewall spacer is formed adjacent to the pillar to cover a first portion and a second portion of the area of reduced thickness of the conductive layer. The pillar is replaced with a select gate. The area of reduced thickness is selectively removed to leave the first and second portions as control gates.

Abstract: A multi-bit split-gate memory device is formed over a substrate. A storage layer is formed over the substrate. A first conductive layer is formed over the storage layer. A thickness of a portion of the conductive layer is removed to leave a pillar of the conductive layer and an area of reduced thickness of the conductive layer. A first sidewall spacer is formed adjacent to the pillar to cover a first portion and a second portion of the area of reduced thickness of the conductive layer. The pillar is replaced with a select gate. The area of reduced thickness is selectively removed to leave the first and second portions as control gates.

Abstract: A method forms a nonvolatile memory device using a semiconductor substrate. A charge storage layer is formed overlying the semiconductor substrate and a layer of gate material is formed overlying the charge storage layer to form a control gate electrode. A protective layer overlies the layer of gate material. Dopants are implanted into the semiconductor substrate and are self-aligned to the control gate electrode on at least one side of the control gate electrode to form a source and a drain in the semiconductor substrate on opposing sides of the control gate electrode. The protective layer prevents the dopants from penetrating into the control gate electrode. The protective layer that overlies the layer of gate material is removed. Electrical contact is made to the control gate electrode, the source and the drain. In one form a select gate is also provided in the memory device.

Abstract: A TV-set is equipped with HDMI and USB connections that allow it to display and run audio-video content from a variety of conventional consumer devices. The TV-set is further equipped to provide a secure HDMI-USB interface that will allow the transfer of licensed high definition content and Internet subscriber services. Such secure HDMI-USB interface also enables a selection of proprietary application modules to be attached. Downloadable user interface templates, much like XML style sheets, are rendered to a user interface displayed on the screen. These are associated with corresponding thumbnails and URI's that allow a user to surf through lists and catalogs of materials, and then to play them in the appropriate formats and provide the machine with a customized controller. A remote commander is simplified, yet expanded to control all the attached devices through interactions with the user interface.

Abstract: The present invention relates to novel crystalline forms of the platelet aggregation inhibitor (+)-(S)-methyl-2-(2-chlorophenyl)-(6,7-dihydro-4H-thieno[3,2-c]pyrid-5-yl)acetate, clopidogrel (1), in the form of hydrogen bromide salts, identified as polymorph forms 1, 2 and 3. The present invention further relates to processes for preparing such forms, pharmaceutical compositions comprising such forms, and uses for such forms and compositions. The pharmaceutical compositions may be used, in particular, for inhibiting platelet aggregation or for treating, preventing or managing thrombosis, atherothrombosis, an atherothrombotic event, ischaemic stroke, myocardial infarction, non-Q-wave myocardial infarction, atherosclerosis, peripheral arterial disease, or unstable angina. The present invention also relates to methods of treating said disorders. Formula (1).

Abstract: An insulating layer formed by deposition is annealed in the presence of radical oxygen to reduce bond defects. A substrate is provided. An oxide layer is deposited overlying the substrate. The oxide layer has a plurality of bond defects. The oxide layer is annealed in the presence of radical oxygen to modify a substantial portion of the plurality of bond defects by using oxygen atoms. The anneal, in one form, is an in-situ steam generation (ISSG) anneal. In one form, the insulating layer overlies a layer of charge storage material, such as nanoclusters, that form a gate structure of a semiconductor storage device. The ISSG anneal repairs bond defects by oxidizing defective silicon bonds in the oxide layer when the oxide layer is silicon dioxide.

Abstract: A semiconductor device includes a plurality of pillars formed from a conductive material. The pillars are formed by using a plurality of nanocrystals as a hardmask for patterning the conductive material. A thickness of the conductive material determines the height of the pillars. Likewise, a width of the pillar is determined by the diameter of a nanocrystal. In one embodiment, the pillars are formed from polysilicon and function as the charge storage region of a non-volatile memory cell having good charge retention and low voltage operation. In another embodiment, the pillars are formed from a metal and function as a plate electrode for a metal-insulator-metal (MIM) capacitor having an increased capacitance without increasing the surface area of an integrated circuit.

Abstract: A FinFET includes a plurality of semiconductor fins. Over a semiconductor layer, patterned features (e.g. of minimum photolithographic size and spacing) are formed. In one example of fin formation, a first set of sidewall spacers are formed adjacent to the sides of these patterned features. A second set of sidewall spacers of a different material are formed adjacent to the sides of the first set of sidewall spacers. The first set of sidewall spacers are removed leaving the second set of sidewall spacers spaced from the patterned features. Both the second set of sidewall spacers and the patterned features are used as a mask to an etch that leaves semiconductor fins patterned as per the second set of sidewall spacers and the patterned features. These resulting semiconductor fins, which have sub-lithographic spacings, are then used for channels of a FinFET transistor.

Abstract: A process for forming an electronic device can be performed, such that as little as one gate electric layer may be formed within each region of the electronic device. In one embodiment, the electronic device can include an NVM array and other regions that have different gate dielectric layers. By protecting the field isolation regions within the NVM array and other regions while gate dielectric layer are formed, the field isolation regions may be exposed to as little as one oxide etch between the time any of the gate dielectric layers are formed the time such gate dielectric layers are covered by gate electrode layers. The process helps to reduce field isolation erosion and reduce problems associated therewith.

Abstract: A method for removing nanoclusters from a semiconductor device includes etching a selected portion of an insulating layer, flowing a reducing gas over the semiconductor device at a temperature in a range of 400-900 degrees Celsius, and flowing a gas comprising halogen over the semiconductor device a temperature in a range of 400-900 degrees Celsius. In another form, a method for removing the nanoclusters includes implanting germanium or nitrogen into the nanoclusters, etching a selected portion of the insulating layer using a dry etch process, and removing the layer of nanoclusters using a wet etch process that is selective to an insulating layer.

Abstract: An electronic device can include an NVM structure and a gate electrode outside an NVM array. In one embodiment, a first gate dielectric layer and a first gate electrode layer are formed before forming NVM cells within an NVM array. The first gate electrode layer helps to protect the first gate dielectric layer from becoming thinner or thicker during subsequent processing used to form NVM cells. In another embodiment, NVM structures and transistor structures can be formed where the NVM structures have one more spacer adjacent to the NVM structures as compared to the transistor structures.

Abstract: A plurality of memory cell devices is formed by using an intermediate dual polysilicon-nitride control electrode stack overlying nanoclusters. The stack includes a first-formed polysilicon-nitride layer and a second-formed polysilicon-containing layer. The second-formed polysilicon-containing layer is removed from areas containing the plurality of memory cells. In one form the second-formed polysilicon-containing layer also contains a nitride portion which is also removed, thereby leaving the first-formed polysilicon-nitride layer for the memory cell devices. In another form the second-formed ploysilicon-containing layer does not contain nitride and a nitride portion of the first-formed polysilicon-nitride layer is also removed. In the latter form a subsequent nitride layer is formed over the remaining polysilicon layer. In both forms a top portion of the device is protected from oxidation, thereby preserving size and quality of underlying nanoclusters.

Abstract: A system and method for synchronizing a database having metadata and raw data. Metadata may be fully synchronized between two systems, with copies stored on both systems. Raw data may be selectively synchronized, so that a client system need not store all of the raw data locally. When disconnected, the client system may identify certain portions of the raw data to store locally, and such data may be synchronized when reconnected to a server system.

Abstract: A method for forming nanoclusters includes providing a semiconductor substrate; forming a dielectric layer over the semiconductor substrate, exposing the semiconductor substrate to a first flux of atoms to form first nuclei on the dielectric layer, exposing the first nuclei to a first inert atmosphere after exposing the semiconductor substrate to the first flux, and exposing the semiconductor substrate to a second flux of atoms to form second nuclei after exposing the first nuclei to an inert atmosphere.