Patents by Inventor Rajesh Reddy Challa

Rajesh Reddy Challa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • CIRCUITRY FOR TRACKING BIAS VOLTAGE BEHAVIOR
    Publication number: 20190378550
    Abstract: Various implementations described herein refer to an integrated circuit having dummy wordline driver circuitry coupled to a dummy wordline and dummy bitline pulldown circuitry coupled between a dummy bitline and the dummy wordline. The integrated circuit may include dummy wordline tracking circuitry coupled to the dummy wordline between the dummy wordline driver circuitry and the dummy bitline pulldown circuitry. The dummy wordline tracking circuitry may have one or more variable capacitors that are coupled between the dummy wordline and a variable voltage source.
    Type: Application
    Filed: June 8, 2018
    Publication date: December 12, 2019
    Inventors: Rahul Mathur, Rajesh Reddy Challa, Gaurang Prabhakar Narvekar
  • Circuitry for tracking bias voltage behavior
    Patent number: 10497414
    Abstract: Various implementations described herein refer to an integrated circuit having dummy wordline driver circuitry coupled to a dummy wordline and dummy bitline pulldown circuitry coupled between a dummy bitline and the dummy wordline. The integrated circuit may include dummy wordline tracking circuitry coupled to the dummy wordline between the dummy wordline driver circuitry and the dummy bitline pulldown circuitry. The dummy wordline tracking circuitry may have one or more variable capacitors that are coupled between the dummy wordline and a variable voltage source.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: December 3, 2019
    Assignee: Arm Limited
    Inventors: Rahul Mathur, Rajesh Reddy Challa, Gaurang Prabhakar Narvekar