Patents by Inventor Rajesh Renegarajan

Rajesh Renegarajan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6867472
    Abstract: A semiconductor device includes a transistor junction formed in a substrate adjacent to an isolation region. A region between the transistor junction and the isolation region includes an area susceptible to hot carrier effects. The transistor junction extends from a surface of the substrate to a first depth. A buried conductive channel layer is formed within the transistor junction between the surface of the substrate and the first depth. The buried conductive channel layer has a peak conduction depth, which is different from a depth of the area susceptible to hot carrier effects.
    Type: Grant
    Filed: January 8, 2003
    Date of Patent: March 15, 2005
    Assignees: Infineon Technologies AG, International Business Machines Corporation
    Inventors: Rajesh Renegarajan, Giuseppe LaRosa, Mark Dellow
  • Publication number: 20040142500
    Abstract: A semiconductor device includes a transistor junction formed in a substrate adjacent to an isolation region. A region between the transistor junction and the isolation region includes an area susceptible to hot carrier effects. The transistor junction extends from a surface of the substrate to a first depth. A buried conductive channel layer is formed within the transistor junction between the surface of the substrate and the first depth. The buried conductive channel layer has a peak conduction depth, which is different from a depth of the area susceptible to hot carrier effects.
    Type: Application
    Filed: January 8, 2003
    Publication date: July 22, 2004
    Applicants: Infineon Technologies North America Corp., International Business Machines Corporation
    Inventors: Rajesh Renegarajan, Giuseppe Larosa, Mark Dellow