Patents by Inventor Rajesh S. Madukkarumukumana

Rajesh S. Madukkarumukumana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7757231
    Abstract: In some embodiments, the invention involves a system to deprivilege components of a virtual machine monitor and enable deprivileged service virtual machines (SVMs) to handle selected trapped events. An embodiment of the invention is a hybrid VMM operating on a platform with hardware virtualization support. The hybrid VMM utilizes features from both hypervisor-based and host-based VMM architectures. In at least one embodiment, the functionality of a traditional VMM is partitioned into a small platform-dependent part called a micro-hypervisor (MH) and one or more platform-independent parts called service virtual machines (SVMs). The micro-hypervisor operates at a higher virtual machine (VM) privilege level than any SVM, while the SVM and other VMs may still have access to any instruction set architecture (ISA) privilege level. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 10, 2004
    Date of Patent: July 13, 2010
    Assignee: Intel Corporation
    Inventors: Andrew V. Anderson, Steven M. Bennett, Erik Cota-Robles, Alain Kägi, Gilbert Neiger, Rajesh S. Madukkarumukumana, Sebastian Schoenberg, Richard Uhlig, Michael A. Rothman, Vincent J. Zimmer, Stalinselvaraj Jeyasingh
  • Patent number: 7702826
    Abstract: An apparatus and method related to performing Remote Direct Memory Access Request (“RDMA”) is presented. In one embodiment, the apparatus comprises Remote direct memory access (“RDMA”) logic that executes a direct memory access (“DMA”) request from the remote peer. The apparatus further comprising a protection checking logic to verify a key and a target address in the DMA request and conversion logic to convert the target address to an input/output virtual address (“IOVA”) if the conversion is required. The IOVA is to be translated to the host physical address by an address translation unit at another hardware subsystem.
    Type: Grant
    Filed: December 28, 2005
    Date of Patent: April 20, 2010
    Assignee: Intel Corporation
    Inventors: Ali S. Oztaskin, Rajesh S. Madukkarumukumana, Greg J. Regnier
  • Patent number: 7467381
    Abstract: The present disclosure relates to the resource management of virtual machine(s) using hardware address mapping, and, more specifically, to facilitate direct access to devices from virtual machines, utilizing control of hardware address translation facilities.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: December 16, 2008
    Assignee: Intel Corporation
    Inventors: Rajesh S. Madukkarumukumana, Gilbert Neiger, Ioannis Schoinas
  • Patent number: 7451197
    Abstract: Provided are a method, system, and article of manufacture. A network communication request is received at an offload application, wherein the offload application interfaces with a first network stack implemented in an operating system and a second network stack implemented in a hardware device. A determination is made if the network communication request can be processed by the second network stack. If the network communication request can be processed by the second network stack, then the network communication request is offloaded for processing to the hardware device.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: November 11, 2008
    Assignee: Intel Corporation
    Inventors: Arlin R. Davis, Rajesh S. Madukkarumukumana, Stan C. Smith
  • Patent number: 7406583
    Abstract: An autonomic computing environment is provided by sequestering one of a plurality of processor resources, partitioning a memory, and hiding an input/output (I/O) device. One processor resource is sequestered such that the sequestered processor resource is not exposed to the remaining processor resources as a processor resource. A memory region is partitioned to provide a service processing portion such that the sequestered processor resource has access to all of the memory region and the remaining processor resources have access to at least a portion of the memory region but do not have access to the service processing portion. A first I/O device is hidden such that the sequestered processor resource has access to the first I/O device and the remaining processor resources do not have access to the first I/O device.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: July 29, 2008
    Assignee: Intel Corporation
    Inventors: Ulhas Warrier, Rajesh S. Madukkarumukumana
  • Patent number: 7400639
    Abstract: Provided are a method, system, and article of manufacture, wherein in one implementation of the method a memory buffer is allocated in a host memory by a protocol processor, wherein the host memory is comprised in a host that is coupled to a network adapter. A packet is processed initially at the network adapter to generate data for offloading to the memory buffer in the host. The generated data is offloaded by the protocol processor to the memory buffer in the host. The offloaded data is processed by the protocol processor.
    Type: Grant
    Filed: August 7, 2003
    Date of Patent: July 15, 2008
    Assignee: Intel Corporation
    Inventors: Rajesh S. Madukkarumukumana, Jie Ni
  • Patent number: 7222203
    Abstract: The present disclosure relates to the handling of interrupts in a environment that utilizes virtual machines, and, more specifically, to the steering of interrupts between multiple logical processors running virtual machines.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: May 22, 2007
    Assignee: Intel Corporation
    Inventors: Rajesh S. Madukkarumukumana, Ioannis Schoinas, Gilbert Neiger
  • Patent number: 7103683
    Abstract: Provided are a method, system, and article of manufacture, where in one embodiment of the method metadata related to a packet may be allocated in a host memory by a protocol processor, where the host memory may be comprised in a host that may be capable of being coupled to a network adapter. The metadata may be copied from the host memory to an adapter memory that may be associated with the network adapter. The copied metadata may be processed by the protocol processor.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: September 5, 2006
    Assignee: Intel Corporation
    Inventors: Rajesh S. Madukkarumukumana, Jie Ni
  • Publication number: 20040243723
    Abstract: Provided are a method, system, and article of manufacture. A network communication request is received at an offload application, wherein the offload application interfaces with a first network stack implemented in an operating system and a second network stack implemented in a hardware device. A determination is made if the network communication request can be processed by the second network stack. If the network communication request can be processed by the second network stack, then the network communication request is offloaded for processing to the hardware device.
    Type: Application
    Filed: May 30, 2003
    Publication date: December 2, 2004
    Applicant: Intel Corporation
    Inventors: Arlin R. Davis, Rajesh S. Madukkarumukumana, Stan C. Smith
  • Patent number: 6460080
    Abstract: A transport service provider provides a credit-based flow control scheme and is designed to operate over VI Architecture. The credit-based flow control scheme reduces overhead (e.g., reduces buffer copies and kernel processing) by relying upon the reliability properties of the underlying VI Architecture. If the number of send credits is sufficient, then the sender prepares and sends the packet. Otherwise, the sender sends a Credit Request and waits for a Credit Response. Upon receiving the corresponding Credit Response, the sender continues sending data packets. In response to a sender's Credit Request, the receiver sends the Credit Response only when it has enough receive credits (above a threshold value or low water mark).
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: October 1, 2002
    Assignee: Intel Corporation
    Inventors: Hemal V. Shah, Rajesh S. Madukkarumukumana
  • Publication number: 20020055993
    Abstract: A transport service provider provides a credit-based flow control scheme and is designed to operate over VI Architecture. The credit-based flow control scheme reduces overhead (e.g., reduces buffer copies and kernel processing) by relying upon the reliability properties of the underlying VI Architecture. If the number of send credits is sufficient, then the sender prepares and sends the packet. Otherwise, the sender sends a Credit Request and waits for a Credit Response. Upon receiving the corresponding Credit Response, the sender continues sending data packets. In response to a sender's Credit Request, the receiver sends the Credit Response only when it has enough receive credits (above a threshold value or low water mark).
    Type: Application
    Filed: October 31, 2001
    Publication date: May 9, 2002
    Inventors: Hemal V. Shah, Rajesh S. Madukkarumukumana
  • Patent number: 6347337
    Abstract: A transport service provider provides a credit-based flow control scheme and is designed to operate over VI Architecture. The credit-based flow control scheme reduces overhead (e.g., reduces buffer copies and kernel processing) by relying upon the reliability properties of the underlying VI Architecture. If the number of send credits is sufficient, then the sender prepares and sends the packet. Otherwise, the sender sends a Credit Request and waits for a Credit Response. Upon receiving the corresponding Credit Response, the sender continues sending data packets. In response to a sender's Credit Request, the receiver sends the Credit Response only when it has enough receive credits (above a threshold value or low water mark).
    Type: Grant
    Filed: August 20, 1999
    Date of Patent: February 12, 2002
    Assignee: Intel Corporation
    Inventors: Hemal V. Shah, Rajesh S. Madukkarumukumana