Patents by Inventor Rajesh

Rajesh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210004276
    Abstract: Systems, apparatuses and methods may provide for technology that automatically determines a first proposed change to an existing resource allocation associated with a first application in a first node, wherein the first proposed change is determined at least partially based on a requested resource allocation associated with a pending application and a first tolerance associated with the first application. The technology may also issue the first proposed change to the first application and automatically conduct the first proposed change if the first application accepts the first proposed change.
    Type: Application
    Filed: September 16, 2020
    Publication date: January 7, 2021
    Inventors: Kaushik Balasubramanian, Rajesh Poornachandran, Karan Puttannaiah
  • Publication number: 20210004328
    Abstract: Methods and apparatus implementing Hardware/Software co-optimization to improve performance and energy for inter-VM communication for NFVs and other producer-consumer workloads. The apparatus include multi-core processors with multi-level cache hierarchies including and L1 and L2 cache for each core and a shared last-level cache (LLC). One or more machine-level instructions are provided for proactively demoting cachelines from lower cache levels to higher cache levels, including demoting cachelines from L1/L2 caches to an LLC. Techniques are also provided for implementing hardware/software co-optimization in multi-socket NUMA architecture system, wherein cachelines may be selectively demoted and pushed to an LLC in a remote socket. In addition, techniques are disclosure for implementing early snooping in multi-socket systems to reduce latency when accessing cachelines on remote sockets.
    Type: Application
    Filed: September 21, 2020
    Publication date: January 7, 2021
    Inventors: Ren Wang, Andrew J. Herdrich, Yen-cheng Liu, Herbert H. Hum, Jong Soo Park, Christopher J. Hughes, Namakkal N. Venkatesan, Adrian C. Moga, Aamer Jaleel, Zeshan A. Chishti, Mesut A. Ergin, Jr-shian Tsai, Alexander W. Min, Tsung-yuan C. Tai, Christian Maciocco, Rajesh Sankaran
  • Publication number: 20210004334
    Abstract: Embodiment of this disclosure provides a mechanism to extend a workload instruction to include both untranslated and translated address space identifiers (ASIDs). In one embodiment, a processing device comprising a translation manager is provided. The translation manager receives a workload instruction from a guest application. The workload instruction comprises an untranslated (ASID) and a workload for an input/output (I/O) device. The untranslated ASID is translated to a translated ASID. The translated ASID inserted into a payload of the workload instruction. Thereupon, the payload is provided to a work queue of the I/O device to execute the workload based in part on at least one of: the translated ASID or the untranslated ASID.
    Type: Application
    Filed: March 28, 2018
    Publication date: January 7, 2021
    Inventors: Kun TIAN, Xiao ZHENG, Ashok RAJ, Sanjay KUMAR, Rajesh SANKARAN
  • Publication number: 20210003629
    Abstract: An apparatus of a multi-chip package (MCP) of a functional safety system, comprises a processor to be configured as a master chip in a master-slave arrangement with a slave chip in the MCP, and a memory coupled to the processor to store one or more infield test scan patterns. The processor includes a bock to couple the master chip to the slave chip via a high-speed input/output (IO) interface to retrieve the one or more infield test scan patterns from the memory via the master chip, and to provide the one or more infield test scan patterns to the slave chip via the high-speed IO interface in response to the functional safety system entering an infield test mode.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 7, 2021
    Applicant: Intel Corporation
    Inventors: Asad Azam, Amit Kumar Srivastava, Enrico Carrieri, Rajesh Bhaskar
  • Patent number: 10882813
    Abstract: The present invention relates to an improved method for the synthesis of Ferric Citrate and also to provide an amorphous form of Ferric Citrate having an active surface area less than 14 sq.m/g.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: January 5, 2021
    Assignee: Biophore India Pharmaceuticals Pvt. Ltd.
    Inventors: Manik Reddy Pullagurla, Mecheril Valsan Nanda Kumar, Jagadeesh Babu Rangisetty, Rajesh Bhudeti, Radha Nagarapu
  • Patent number: 10887848
    Abstract: A system is disclosed, comprising: a solar panel; an electric power supply source; a wireless fronthaul access point coupled to a radio mast and in communication with a remote baseband unit, the wireless fronthaul access point further comprising a first millimeter wave wireless interface; a self-organizing network module in communication with a coordinating server; and an antenna-integrated radio for providing access to user equipments (UEs), mounted within line of sight on the radio mast with the wireless fronthaul access point, the antenna-integrated radio further comprising: a second millimeter wave wireless interface configured to receive the digital I and Q signaling information from the remote baseband unit wirelessly via the wireless fronthaul access point, wherein the wireless fronthaul access point thereby wirelessly couples the remote baseband unit and the antenna-integrated radio. Synchronization is used to pack used resource blocks to reduce the duty cycle of the PAs, thereby reducing power.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: January 5, 2021
    Assignee: Parallel Wireless, Inc.
    Inventors: Steven Paul Papa, Prashanth Rao, Yang Cao, Rajesh Kumar Mishra
  • Patent number: 10888009
    Abstract: Various embodiments of a sealed package and a method of forming such package are disclosed. The package includes a housing having an inner surface and an outer surface, a dielectric substrate having a first major surface and a second major surface, and a dielectric bonding ring disposed between the first major surface of the dielectric substrate and the housing, where the dielectric bonding ring is hermetically sealed to both the first major surface of the dielectric substrate and the housing. The package further includes an electronic device disposed on the first major surface of the dielectric substrate, and a power source disposed at least partially within the housing and electrically connected to the electronic device.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: January 5, 2021
    Assignee: Medtronic, Inc.
    Inventors: Christian S. Nielsen, Rajesh V. Iyer, Gordon O. Munns, Andrew J. Ries, Andrew J. Thom
  • Patent number: 10886273
    Abstract: Some embodiments include gated bipolar junction transistors. The transistors may include a base region between a collector region and an emitter region; with a B-C junction being at an interface of the base region and the collector region, and with a B-E junction being at an interface of the base region and the emitter region. The transistors may include material having a bandgap of at least 1.2 eV within one or more of the base, emitter and collector regions. The gated transistors may include a gate along the base region and spaced from the base region by dielectric material, with the gate not overlapping either the B-C junction or the B-E junction. Some embodiments include memory arrays containing gated bipolar junction transistors. Some embodiments include methods of forming gated bipolar junction transistors.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: January 5, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Rajesh N. Gupta, Farid Nemati, Scott T. Robins
  • Patent number: 10883649
    Abstract: Various embodiments include a monitor of a camera-monitor system in a motor vehicle comprising: a display mounted in a field of vision of a driver of the motor vehicle; wherein the monitor is height-adjustable.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: January 5, 2021
    Assignee: CONTINENTAL AUTOMOTIVE GMBH
    Inventors: Silja Sautter, Werner Miethig, Rajesh Ningaraju, Axel Hügle
  • Patent number: 10887767
    Abstract: A system for integrating wireless service providers' core networks with Wi-Fi radios using a Wireless Services Gateway (WSG). The WSG can allow wireless device users to seamlessly connect to a network such as the internet using both cellular phone antennae as well as Wi-Fi radio antennae while still utilizing their preferred wireless service provider's core network system of billing, authenticating and policy decision making. This system can allow for data transmission of wireless devices through Wi-Fi instead of through cellular antennae, thus increasing bandwidth and data transmission rates.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: January 5, 2021
    Assignee: ARRIS Enterprises LLC
    Inventors: Hemant Bhatnagar, Wayne Chuu, Chetan Hebbalae, Wei-Lun Huang, Rajesh Kaliaperumal, William Kish, Yi-Nan Li, Ronald Mok, Vijikumar Nagaraja, Vankatarao Palli, Yogesh Ranade, Ming-Jye Sheu, Henry Tzeng, You-Lin Yan, Thomas Yu
  • Patent number: 10885199
    Abstract: A pre-boot initialization technique for a computing system allows for encrypting both a manufacturer and original equipment manufacturer firmware routines, as well as handing off data between the manufacturer and original equipment manufacturer firmware routines encrypted with a key provisioned in field programmable fuses with an original equipment manufacturer key. By encrypting the firmware routines and handoff data, security of the pre-boot initialization process is enhanced. Original equipment manufacturer updatable product data may also be encrypted with the original equipment manufacturer key. Additional security may be provided by using trusted input/output capabilities of a trusted execution environment to display information to and receive information from a user. Furthermore, multiple secure phases of configuration may be achieved using wireless credentials exchange components.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: January 5, 2021
    Assignee: McAfee, LLC
    Inventors: Jiewen Yao, Rangasai V. Chaganty, Xiang Ma, Ravi Poovalur Rangarajan, Rajesh Poornachandran, Nivedita Aggarwal, Giri P. Mudusuru, Vincent J. Zimmer, Satya P. Yarlagadda, Amy Chan, Sudeep Das
  • Patent number: 10885320
    Abstract: Described herein is are systems and methods for interpreting gesture(s) and/or sign(s) using a machine-learned model. Information regarding gesture(s) and/or sign(s) is received from a first user. The information can be received via a mixed reality device of the first user and/or a second user. Probabilities that the gesture(s) or sign(s) have particular meanings are calculated using a machine-trained model. The gesture(s) and/or sign(s) are interpreted in accordance with the calculated probabilities. Information regarding the interpreted gesture(s) and/or sign(s) are provided (e.g., displayed as visual text and/or an audible output) to the second user.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: January 5, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Rajesh Rangarajan, Shen Vikul Chauhan
  • Patent number: 10886931
    Abstract: A circuit includes analog input nodes and switches selectively coupling each of the analog input nodes to a capacitive node. Each of the switches is controlled by a respective bit of a channel selection word. Level shifting circuits are respectively coupled in parallel with the switches. A sampling capacitor is coupled between an output node and ground, the output node being coupled to the capacitive node. An analog to digital converter operates to digitize voltages at the output node.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: January 5, 2021
    Assignee: STMicroelectronics International N.V.
    Inventors: Rajesh Narwal, Kavindu Shekhar Benjwal
  • Patent number: 10885486
    Abstract: The present disclosure relates to determining automation potential of a process by dividing the process into subsidiary processes corresponding to five hierarchical tiers, assessing the subsidiary processes by selecting a value for each of one or more parameters for each of the subsidiary processes at the tier five, computing a score for the subsidiary processes at the tier five based on the selected values, identifying a category of automation for the subsidiary processes in the tier five based on the score for the subsidiary processes at the tier five; determining an automation potential indicator for the subsidiary processes in the tier five based on the category of automation and the score; computing a maximum automation potential indicator and an automation potential indicator at each hierarchical tier based on a maximum automation potential indicator and an automation potential indicator at immediately lower tier to compute the automation potential for the process.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: January 5, 2021
    Assignee: GENPACT LUXEMBOURG S.A.R.L.
    Inventors: Shantanu Ghosh, Vivek Saxena, Rajesh Sanghvi, Vikram Jha, Lavi Sharma, Harmeet Kaur
  • Publication number: 20200412620
    Abstract: Wireless configuration diagnosis framework may be provided. A label for a choreography comprising a sequence of frames to be exchanged between a first access point and a first client device may be created by a controller. A reference footprint for the choreography may be created. The reference footprint may comprise, for each frame of the sequence of frames, a frame type, an information element for the frame type, and a bit value for the information element. The reference footprint may be sent to the first access point. A plurality of frames exchanged between the first access point and the first client device associated with the choreography and an outcome for the choreography may be received from the first access point in response to the choreography being triggered.
    Type: Application
    Filed: June 27, 2019
    Publication date: December 31, 2020
    Applicant: Cisco Technology, Inc.
    Inventors: Manoj GUPTA, Sourav CHAKRABORTY, Venkata Prathyusha KUNTUPALLI, Rajesh S. PAZHYANNUR, Jerome HENRY
  • Publication number: 20200409844
    Abstract: Disclosed embodiments relate to an asynchronous cache-flush engine to manage platform coherent and memory-side caches. In one example, a system includes multiple interconnected sockets each including a cache flush engine (CFE), a core, and an associated cache hierarchy including a plurality of caches, one of the CFEs designated as a master CFE in a master socket, the master CFE to: receive a request specifying an opcode and a range, the opcode calling for a cache flush, execute the request to cause writeback and, if indicated by the request, invalidation of modified cache lines in the master socket falling within the range, and communicate a request to any other, slave sockets in the system each having a slave CFE to cause writeback and, if indicated by the request, invalidation of modified cache lines in the slave socket falling within the range.
    Type: Application
    Filed: June 26, 2019
    Publication date: December 31, 2020
    Inventors: Vivekananthan SANJEEPAN, Gideon GERZON, Ishwar AGARWAL, Rajesh SANKARAN, Andy RUDOFF
  • Publication number: 20200412775
    Abstract: A conferencing computing device, including memory storing one or more dispatch data structures. The conferencing computing device may further include a processor configured to, at a port, receive, from a sender computing device, a first input packet including first input packet data and a second input packet that includes a copy of the first input packet data, via a first communication channel and a second communication channel, respectively. Based on the input packet data and the one or more dispatch data structures, the processor may add the input packets to a queue of a transport provider bound to the port. The processor may transmit the input packets to an application program instance associated with the queue. The processor may determine that the first communication channel or the second communication channel is disconnected and may maintain communication with the sender computing device through the port via a remaining communication channel.
    Type: Application
    Filed: September 10, 2020
    Publication date: December 31, 2020
    Applicant: Micosoft Technology Licensing, LLC
    Inventors: Rajesh GUNNALAN, Mihhail Konovalov, Tin Qian
  • Publication number: 20200411483
    Abstract: Direct bonded stack structures for increased reliability and improved yields in microelectronics are provided. Structural features and stack configurations are provided for memory modules and 3DICs to reduce defects in vertically stacked dies. Example processes alleviate warpage stresses between a thicker top die and direct bonded dies beneath it, for example. An etched surface on the top die may relieve warpage stresses. An example stack may include a compliant layer between dies. Another stack configuration replaces the top die with a layer of molding material to circumvent warpage stresses. An array of cavities on a bonding surface can alleviate stress forces. One or more stress balancing layers may also be created on a side of the top die or between other dies to alleviate or counter warpage. Rounding of edges can prevent stresses and pressure forces from being destructively transmitted through die and substrate layers. These measures may be applied together or in combinations in a single package.
    Type: Application
    Filed: June 24, 2020
    Publication date: December 31, 2020
    Inventors: Cyprian Emeka Uzoh, Rajesh Katkar, Thomas Workman, Guilian Gao, Gaius Gillman Fountain, JR., Laura Wills Mirkarimi, Belgacem Haba, Gabriel Z. Guevara, Joy Watanabe
  • Publication number: 20200405482
    Abstract: A prosthetic heart valve comprises a radially collapsible and expandable annular frame and a leaflet structure comprising three leaflets. Each leaflet has an upper edge portion, a curved lower edge portion and two side flaps, wherein each side flap is connected to an adjacent side flap of another leaflet to form commissures of the leaflet structure, with each commissure being attached to the frame. An annular inner sleeve comprises three U-shaped portions positioned along the curved lower edge portions of the leaflets. An annular outer sleeve extends around are outer surface of the frame, wherein the outer sleeve is made of pericardium. The frame is made of Nitinol and the prosthetic valve can be radially crimped to a radially collapsed configuration inside a sheath for delivery into a patient's body and self-expand to a radially expanded configuration when released from the sheath inside the patient's body.
    Type: Application
    Filed: September 11, 2020
    Publication date: December 31, 2020
    Applicant: Edwards Lifesciences Corporation
    Inventors: Ilia Hariton, Netanel Benichou, Yaacov Nitzan, Bella Felsen, Diana Nguyen-Thien-Nhon, Rajesh A. Khanna, Son V. Nguyen, Tamir S. Levi, Itai Pelled
  • Publication number: 20200409585
    Abstract: A system for tracking memory access patterns to be used in making data placement and migration policies. The system includes a processing unit and a system memory. The system memory includes a local memory and a remote memory, each of which having mapped thereon, a plurality of memory pages. Each of the plurality of memory pages corresponds to one or more physical addresses. A set of attributes for each memory page is stored in a physical attribute table (PAT). The PAT is looked up and the attributes updated when a memory access is detected. Attributes stored in the PAT are used to control the movement of memory pages between the local memory and the remote memory. When the attributes in the PAT indicate a remote memory page is being accessed frequently by the processing unit, the remote memory page is moved from the remote memory to the local memory.
    Type: Application
    Filed: June 29, 2019
    Publication date: December 31, 2020
    Applicant: Intel Corporation
    Inventors: David Koufaty, Rajesh Sankaran, Rupin Vakharwala