Patents by Inventor Rajinish K. Prasad

Rajinish K. Prasad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Performing scenario reduction
    Patent number: 8413099
    Abstract: Some embodiments of the present invention provide techniques and systems for reducing the number of scenarios over which a circuit design is optimized. Each scenario in the set of scenarios can be associated with a process corner, an operating condition, and/or an operating mode. During operation, the system can receive a set of scenarios over which the circuit design is to be optimized. Next, the system can compute values of constrained objects in the circuit design over the set of scenarios. The system can then determine a subset of scenarios based at least on the values of the constrained objects, so that if the circuit design meets design constraints in each scenario in the subset of scenarios, the circuit design is expected to meet the design constraints in each scenario in the set of scenarios.
    Type: Grant
    Filed: June 7, 2010
    Date of Patent: April 2, 2013
    Assignee: Synopsys, Inc.
    Inventors: Amir H. Mottaez, Rajinish K. Prasad
  • METHOD AND APPARATUS FOR PERFORMING SCENARIO REDUCTION
    Publication number: 20110302546
    Abstract: Some embodiments of the present invention provide techniques and systems for reducing the number of scenarios over which a circuit design is optimized. Each scenario in the set of scenarios can be associated with a process corner, an operating condition, and/or an operating mode. During operation, the system can receive a set of scenarios over which the circuit design is to be optimized. Next, the system can compute values of constrained objects in the circuit design over the set of scenarios. The system can then determine a subset of scenarios based at least on the values of the constrained objects, so that if the circuit design meets design constraints in each scenario in the subset of scenarios, the circuit design is expected to meet the design constraints in each scenario in the set of scenarios.
    Type: Application
    Filed: June 7, 2010
    Publication date: December 8, 2011
    Applicant: SYNOPSYS, INC.
    Inventors: Amir H. Mottaez, Rajinish K. Prasad