Patents by Inventor Rajith K. Mavila

Rajith K. Mavila has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9507403
    Abstract: Systems and methods may provide for conducting a reward determination for a plurality of sleep states to obtain a plurality of reward determinations with respect to a device. In addition, a sleep state may be selected for the device from the plurality of sleep states based at least in part on the plurality of reward determinations. In one example, false entry and missed opportunity probabilities may be determined for stochastic interrupts, wherein the reward determination is conducted based at least in part on the false entry and missed opportunity probabilities.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: November 29, 2016
    Assignee: Intel Corporation
    Inventors: Alexander W. Min, Ren Wang, Jr-Shian Tsai, Mesut A. Ergin, Tsung-Yuan C. Tai, Rajith K. Mavila, Prakash N. Iyer
  • Patent number: 9471132
    Abstract: Various embodiments are generally directed to an apparatus, method and other techniques for determining a sleep configuration state for each of a plurality of subsystems having an associated subsystem sleep control register for entry into a lower power state, configuring each of the associated subsystem sleep control registers with the sleep configuration state for each of the subsystems and enabling the sleep configuration state for each of the subsystems in parallel when transitioning to the lower power state.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: October 18, 2016
    Assignee: INTEL CORPORATION
    Inventors: Vasudev Bibikar, Rajith K. Mavila
  • Publication number: 20150095677
    Abstract: Various embodiments are generally directed to an apparatus, method and other techniques for determining a sleep configuration state for each of a plurality of subsystems having an associated subsystem sleep control register for entry into a lower power state, configuring each of the associated subsystem sleep control registers with the sleep configuration state for each of the subsystems and enabling the sleep configuration state for each of the subsystems in parallel when transitioning to the lower power state.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 2, 2015
    Inventors: VASUDEV BIBIKAR, RAJITH K. MAVILA
  • Publication number: 20140289546
    Abstract: Systems and methods may provide for conducting a reward determination for a plurality of sleep states to obtain a plurality of reward determinations with respect to a device. In addition, a sleep state may be selected for the device from the plurality of sleep states based at least in part on the plurality of reward determinations. In one example, false entry and missed opportunity probabilities may be determined for stochastic interrupts, wherein the reward determination is conducted based at least in part on the false entry and missed opportunity probabilities.
    Type: Application
    Filed: December 27, 2011
    Publication date: September 25, 2014
    Inventors: Alexander W. Min, Ren Wang, Jr-Shian Tsai, Mesut A. Ergin, Tsung-Yuan C. Tai, Rajith K. Mavila, Prakash N. Iyer
  • Patent number: 7948520
    Abstract: A device for capturing image data includes a first image sensor. A first interface receives the image data from the first image sensor based on a first synchronization signal. The first interface has a first mode that is associated with receiving the first synchronization signal from the first image sensor and a second mode that is associated with sending the first synchronization signal to the first image sensor.
    Type: Grant
    Filed: June 12, 2008
    Date of Patent: May 24, 2011
    Assignee: Marvell International Ltd.
    Inventors: Bradley C. Aldrich, Rajith K. Mavila
  • Patent number: 7391437
    Abstract: A system includes an image sensor and an interface to receive image data from the image sensor. The interface selects between providing at least one synchronization signal to the image sensor and receiving the synchronization signal(s) from the image sensor. The synchronization signal(s) are associated with the communication of the image data from the image sensor.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: June 24, 2008
    Assignee: Marvell International Ltd.
    Inventors: Bradley C. Aldrich, Rajith K. Mavila
  • Publication number: 20080148132
    Abstract: An error detection and correction scheme for multi-level cell memory arrays is disclosed. By separating adjacent bits of data into multiple bit streams, the likelihood of error correction is increased.
    Type: Application
    Filed: October 26, 2006
    Publication date: June 19, 2008
    Inventor: Rajith K. Mavila
  • Publication number: 20040119844
    Abstract: A system includes an image sensor and an interface to receive image data from the image sensor. The interface selects between providing at least one synchronization signal to the image sensor and receiving the synchronization signal(s) from the image sensor. The synchronization signal(s) are associated with the communication of the image data from the image sensor.
    Type: Application
    Filed: December 18, 2002
    Publication date: June 24, 2004
    Inventors: Bradley C. Aldrich, Rajith K. Mavila