Abstract: A system and method for routing interconnections through the layout of an integrated circuit is used in conjunction with a sliceable circuit layout specification that specifies the regions of the layout occupied by circuit components, a specification of the locations of terminals in the layout, and a netlist specifying for each terminal the set of other terminals that are to be connected to it. The regions of the circuit layout not occupied by circuit components are called routing regions. The circuit layout is sequentially sliced, defining a series of rectangular channels, each of which divides a region of the circuit layout containing two or more circuit components into two circuit regions each having at least one circuit component. For each channel, if there are one or more neighboring indented routing regions, a special channel is defined for each such indentation.