Patents by Inventor Rajiv Patel

Rajiv Patel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6656805
    Abstract: A relatively thin gate insulator of a digital switching transistor is formed from a layer of silicon oxynitride which was initially formed by implanting nitrogen atoms in a silicon substrate and oxidizing the nitrogen and silicon. It has been discovered that an outer layer of silicon dioxide is formed as a part of the silicon oxynitride layer. Removing this outer layer of silicon dioxide from the silicon oxynitride layer leaves a thin remaining layer of substantially-only silicon oxynitride as the gate insulator. Thinner gate insulators of approximately 15-21 angstroms, for example, can be formed from a grown thickness of 60 angstroms, for example. Gate insulators for digital and analog transistors may be formed simultaneously with a greater differential in thickness been possible by using conventional nitrogen implantation techniques.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: December 2, 2003
    Assignee: LSI Logic Corporation
    Inventors: Arvind Kamath, Rajiv Patel, Ravindra M. Kapre
  • Patent number: 6586814
    Abstract: A shallow isolating trench is formed in a semiconductor wafer between active component areas to electrically isolate the active components from each other. The isolating trench is primarily formed of an insulating material, such as an oxide, in a recess formed into the wafer. An etch resistant material, such as BTBAS nitride, is placed over the insulating material in the recess. The etch resistant material protects the insulating material from erosion due to subsequent semiconductor fabrication process steps, so the integrity of the isolating trench and the planarity of the wafer are generally maintained.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: July 1, 2003
    Assignee: LSI Logic Corporation
    Inventors: Rajiv Patel, David Chan, Arvind Kamath, Ken Rafftesaeth, Venkatesh P. Gopinath
  • Patent number: 6562729
    Abstract: Silicon nitride gate insulators for digital transistors and silicon dioxide gate insulators for analog transistors of a hybrid integrated circuit (IC) are formed in a single integrated fabrication process. A first area of a silicon substrate of the IC is exposed while a second area is initially covered by a silicon dioxide layer. A layer of silicon nitride is formed on the exposed first area while the initial silicon dioxide layer inhibits the formation of silicon nitride on the second area. Thereafter the initial silicon dioxide layer is removed from the second area to allow a new silicon dioxide layer to be formed there from the exposed silicon substrate. The silicon dioxide layer shields against the adverse influences from silicon nitride formation and permits the initial silicon dioxide layer to be removed by etching. The silicon nitride layer shields against the adverse influences of oxidizing new silicon dioxide layer.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: May 13, 2003
    Assignee: LSI Logic Corporation
    Inventors: Arvind Kamath, Rajiv Patel, Mohammad Mirabedini
  • Publication number: 20030077866
    Abstract: A relatively thin gate insulator of a digital switching transistor is formed from a layer of silicon oxynitride which was initially formed by implanting nitrogen atoms in a silicon substrate and oxidizing the nitrogen and silicon. It has been discovered that an outer layer of silicon dioxide is formed as a part of the silicon oxynitride layer. Removing this outer layer of silicon dioxide from the silicon oxynitride layer leaves a thin remaining layer of substantially-only silicon oxynitride as the gate insulator. Thinner gate insulators of approximately 15-21 angstroms, for example, can be formed from a grown thickness of 60 angstroms, for example. Gate insulators for digital and analog transistors may be formed simultaneously with a greater differential in thickness been possible by using conventional nitrogen implantation techniques.
    Type: Application
    Filed: November 26, 2002
    Publication date: April 24, 2003
    Inventors: Arvind Kamath, Rajiv Patel, Ravindra M. Kapre
  • Patent number: 6521549
    Abstract: A relatively thin gate insulator of a digital switching transistor is formed from a layer of silicon oxynitride which was initially formed by implanting nitrogen atoms in a silicon substrate and oxidizing the nitrogen and silicon. It has been discovered that an outer layer of silicon dioxide is formed as a part of the silicon oxynitride layer. Removing this outer layer of silicon dioxide from the silicon oxynitride layer leaves a thin remaining layer of substantially-only silicon oxynitride as the gate insulator. Thinner gate insulators of approximately 15-21 angstroms, for example, can be formed from a grown thickness of 60 angstroms, for example. Gate insulators for digital and analog transistors may be formed simultaneously with a greater differential in thickness been possible by using conventional nitrogen implantation techniques.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: February 18, 2003
    Assignee: LSI Logic Corporation
    Inventors: Arvind Kamath, Rajiv Patel, Ravindra M. Kapre
  • Publication number: 20020151188
    Abstract: Silicon nitride gate insulators for digital transistors and silicon dioxide gate insulators for analog transistors of a hybrid integrated circuit (IC) are formed in a single integrated fabrication process. A first area of a silicon substrate of the IC is exposed while a second area is initially covered by a silicon dioxide layer. A layer of silicon nitride is formed on the exposed first area while the initial silicon dioxide layer inhibits the formation of silicon nitride on the second area. Thereafter the initial silicon dioxide layer is removed from the second area to allow a new silicon dioxide layer to be formed there from the exposed silicon substrate. The silicon dioxide layer shields against the adverse influences from silicon nitride formation and permits the initial silicon dioxide layer to be removed by etching. The silicon nitride layer shields against the adverse influences of oxidizing new silicon dioxide layer.
    Type: Application
    Filed: June 14, 2002
    Publication date: October 17, 2002
    Applicant: LSI Logic Corporation
    Inventors: Arvind Kamath, Rajiv Patel, Mohammad Mirabedini
  • Patent number: 6436845
    Abstract: Silicon nitride gate insulators for digital transistors and silicon dioxide gate insulators for analog transistors of a hybrid integrated circuit (IC) are formed in a single integrated fabrication process. A first area of a silicon substrate of the IC is exposed while a second area is initially covered by a silicon dioxide layer. A layer of silicon nitride is formed on the exposed first area while the initial silicon dioxide layer inhibits the formation of silicon nitride on the second area. Thereafter the initial silicon dioxide layer is removed from the second area to allow a new silicon dioxide layer to be formed there from the exposed silicon substrate. The silicon dioxide layer shields against the adverse influences from silicon nitride formation and permits the initial silicon dioxide layer to be removed by etching. The silicon nitride layer shields against the adverse influences of oxidizing new silicon dioxide layer.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: August 20, 2002
    Assignee: LSI Logic Corporation
    Inventors: Arvind Kamath, Rajiv Patel, Mohammad Mirabedini
  • Patent number: 6335295
    Abstract: Water for use in wet oxidation of semiconductor surfaces may be generated by reacting ultra pure hydrogen and ultra pure gaseous oxygen without a flame. Because no flame is used, contamination due to a flame impinging on components of a “torch” is not a problem. Flame-free generation of water is accomplished by reacting hydrogen and oxygen under conditions that do not result in ignition. This may be accomplished by provided a diluted hydrogen stream in which molecular hydrogen is mixed with a diluent such as a noble gas or nitrogen. This use of diluted hydrogen also reduces or eliminates the danger of explosion. This can simplify the apparatus design by eliminating the need for complicated interlocks, flame detectors, etc.
    Type: Grant
    Filed: January 15, 1999
    Date of Patent: January 1, 2002
    Assignee: LSI Logic Corporation
    Inventor: Rajiv Patel