Patents by Inventor Rajiv Shukla

Rajiv Shukla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11784856
    Abstract: A combined error checker and sequence generator which shares a LFSR is disclosed which reduces complexity, cost, and area required for implementation while also improving timing margin. A clock and data recovery system recovers a data signal received over a channel from a remote transceiver. Control logic selects different modes of operation of the system. An error detector compares the two sequence signals and records errors in response to differences between the two sequence signals. A sequence generator generates a sequence signal for use by the error detector as a reference sequence signal or for transmission to a remote transceiver. The system includes one or more switching elements configured to selectively route the generated sequence as feedback into the sequence generator or the received sequence signal into the sequence generator subject to whether the combined error checker and sequence generator is in error checker mode or sequence generator mode.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: October 10, 2023
    Assignee: MACOM Technology Solutions Holdings, Inc.
    Inventors: Dianyong Chen, Rajiv Shukla, Bengt Littmann
  • Publication number: 20220239533
    Abstract: A combined error checker and sequence generator which shares a LFSR is disclosed which reduces complexity, cost, and area required for implementation while also improving timing margin. A clock and data recovery system recovers a data signal received over a channel from a remote transceiver. Control logic selects different modes of operation of the system. An error detector compares the two sequence signals and records errors in response to differences between the two sequence signals. A sequence generator generates a sequence signal for use by the error detector as a reference sequence signal or for transmission to a remote transceiver. The system includes one or more switching elements configured to selectively route the generated sequence as feedback into the sequence generator or the received sequence signal into the sequence generator subject to whether the combined error checker and sequence generator is in error checker mode or sequence generator mode.
    Type: Application
    Filed: January 22, 2021
    Publication date: July 28, 2022
    Inventors: Dianyong Chen, Rajiv Shukla, Bengt Littmann
  • Publication number: 20050254565
    Abstract: Transmit amplitude independent adaptive equalizers are provided that compensate for transmission losses in an input signal when the transmit signal amplitude is unknown. Several embodiments are provided, including a first embodiment having an equalizer core, a controllable-swing slicer and an amplitude control loop, a second embodiment having an equalizer core, a fixed-swing slicer and a control loop, a third embodiment having an equalizer core, a variable gain amplifier, and a variable gain amplifier control loop, and a fourth embodiment having an equalizer core, a fixed-swing slicer, a variable gain amplifier, and a variable gain amplifier control loop.
    Type: Application
    Filed: July 22, 2005
    Publication date: November 17, 2005
    Inventors: Apu Sivadas, Atul Gupta, Kenneth Lazaris-Brunner, Vasilis Papanikolaou, Rajiv Shukla, Bharat Tailor
  • Publication number: 20050254566
    Abstract: Transmit amplitude independent adaptive equalizers are provided that compensate for transmission losses in an input signal when the transmit signal amplitude is unknown. Several embodiments are provided, including a first embodiment having an equalizer core, a controllable-swing slicer and an amplitude control loop, a second embodiment having an equalizer core, a fixed-swing slicer and a control loop, a third embodiment having an equalizer core, a variable gain amplifier, and a variable gain amplifier control loop, and a fourth embodiment having an equalizer core, a fixed-swing slicer, a variable gain amplifier, and a variable gain amplifier control loop.
    Type: Application
    Filed: July 22, 2005
    Publication date: November 17, 2005
    Inventors: Apu Sivadas, Atul Gupta, Kenneth Lazaris-Brunner, Vasilis Papanikolaou, Rajiv Shukla, Bharat Tailor
  • Publication number: 20050254567
    Abstract: Transmit amplitude independent adaptive equalizers are provided that compensate for transmission losses in an input signal when the transmit signal amplitude is unknown. Several embodiments are provided, including a first embodiment having an equalizer core, a controllable-swing slicer and an amplitude control loop, a second embodiment having an equalizer core, a fixed-swing slicer and a control loop, a third embodiment having an equalizer core, a variable gain amplifier, and a variable gain amplifier control loop, and a fourth embodiment having an equalizer core, a fixed-swing slicer, a variable gain amplifier, and a variable gain amplifier control loop.
    Type: Application
    Filed: July 22, 2005
    Publication date: November 17, 2005
    Inventors: Apu Sivadas, Atul Gupta, Kenneth Lazaris-Brunner, Vasilis Papanikolaou, Rajiv Shukla, Bharat Tailor
  • Publication number: 20040143101
    Abstract: The present invention provides a variant of an immunoglobulin variable domain including (A) at least one CDR region and (B) framework regions flanking the CDR region, wherein the variant also contains (a) a CDR region having added or substituted therein at least on binding sequence and (b) the flanking framework regions, wherein the binding sequence is heterelogous to the CDR and is an antigenic sequence from a MUC-1 binding sequence.
    Type: Application
    Filed: August 25, 2003
    Publication date: July 22, 2004
    Inventors: Daniel A. Soltis, Ronald M Burch, Rajiv Shukla