Abstract: A lateral double-diffused metal-oxide-semiconductor transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate include a (a) gate conductor extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure and (b) a gate dielectric layer including a least three dielectric sections. Each of the at least three dielectric sections separates the gate conductor from the silicon semiconductor structure by a respective separation distance, where each of the respective separation distances is different from each other of the respective separation distances.

Abstract: A lateral double-diffused metal-oxide-semiconductor transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate include a (a) gate conductor extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure and (b) a gate dielectric layer including a least three dielectric sections. Each of the at least three dielectric sections separates the gate conductor from the silicon semiconductor structure by a respective separation distance, where each of the respective separation distances is different from each other of the respective separation distances.

Abstract: A lateral double-diffused metal-oxide-semiconductor transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate include a (a) gate conductor extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure and (b) a gate dielectric layer including a least three dielectric sections. Each of the at least three dielectric sections separates the gate conductor from the silicon semiconductor structure by a respective separation distance, where each of the respective separation distances is different from each other of the respective separation distances.

Abstract: The structural characteristics of the light-exiting surface of a light emitting device are controlled so as to increase the light extraction efficiency of that surface when the surface is roughened. A light emitting surface comprising layers of materials with different durability to the roughening process exhibits a higher light extraction efficiency than a substantially uniform light emitting surface exposed to the same roughening process. In a GaN-type light emitting device, a thin layer of AlGaN material on or near the light-exiting surface creates sharper features after etching compared to the features created by conventional etching of a surface comprising only GaN material.

Abstract: The structural characteristics of the light-exiting surface of a light emitting device are controlled so as to increase the light extraction efficiency of that surface when the surface is roughened. A light emitting surface comprising layers of materials with different durability to the roughening process exhibits a higher light extraction efficiency than a substantially uniform light emitting surface exposed to the same roughening process. In a GaN-type light emitting device, a thin layer of AlGaN material on or near the light-exiting surface creates sharper features after etching compared to the features created by conventional etching of a surface comprising only GaN material.

Abstract: A lateral double-diffused metal-oxide-semiconductor (LDMOS) transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate includes (a) a first gate conductor and a second gate conductor each extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure in a thickness direction, (b) a first separation dielectric layer separating the first gate conductor from the second gate conductor within the vertical gate, and (c) a gate dielectric layer separating each of the first gate conductor and the second gate conductor from the silicon semiconductor structure.

Abstract: A lateral double-diffused metal-oxide-semiconductor (LDMOS) transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate includes (a) a first gate conductor and a second gate conductor each extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure in a thickness direction, (b) a first separation dielectric layer separating the first gate conductor from the second gate conductor within the vertical gate, and (c) a gate dielectric layer separating each of the first gate conductor and the second gate conductor from the silicon semiconductor structure.

Abstract: A dual-gate, self-aligned lateral double-diffused metal-oxide-semiconductor (LDMOS) transistor includes a silicon semiconductor structure, a lateral gate including a first dielectric layer and a first conductive layer stacked on the silicon semiconductor structure in a thickness direction, and a vertical gate. The vertical gate includes a second dielectric layer and a second conductive layer disposed in a trench of the silicon semiconductor structure, the second dielectric layer defining an edge of the lateral gate in a lateral direction. A method for forming a dual-gate, self-aligned LDMOS transistor includes (a) forming a vertical gate of the LDMOS transistor in a trench of a silicon semiconductor structure and (b) defining a lateral edge of a lateral gate of the LDMOS transistor using the vertical gate.

Abstract: A lateral double-diffused metal-oxide-semiconductor (LDMOS) transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate includes (a) a first gate conductor and a second gate conductor each extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure in a thickness direction, (b) a first separation dielectric layer separating the first gate conductor from the second gate conductor within the vertical gate, and (c) a gate dielectric layer separating each of the first gate conductor and the second gate conductor from the silicon semiconductor structure.

Abstract: The structural characteristics of the light-exiting surface of a light emitting device are controlled so as to increase the light extraction efficiency of that surface when the surface is roughened. A light emitting surface comprising layers of materials with different durability to the roughening process exhibits a higher light extraction efficiency than a substantially uniform light emitting surface exposed to the same roughening process. In a GaN-type light emitting device, a thin layer of AlGaN material on or near the light-exiting surface creates sharper features after etching compared to the features created by conventional etching of a surface comprising only GaN material.

Abstract: A lateral double-diffused metal-oxide-semiconductor transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate include a (a) gate conductor extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure and (b) a gate dielectric layer including a least three dielectric sections. Each of the at least three dielectric sections separates the gate conductor from the silicon semiconductor structure by a respective separation distance, where each of the respective separation distances is different from each other of the respective separation distances.

Abstract: The structural characteristics of the light-exiting surface of a light emitting device are controlled so as to increase the light extraction efficiency of that surface when the surface is roughened. A light emitting surface comprising layers of materials with different durability to the roughening process exhibits a higher light extraction efficiency than a substantially uniform light emitting surface exposed to the same roughening process. In a GaN-type light emitting device, a thin layer of AlGaN material on or near the light-exiting surface creates sharper features after etching compared to the features created by conventional etching of a surface comprising only GaN material.

Abstract: The structural characteristics of the light-exiting surface of a light emitting device (200) are controlled so as to increase the light extraction efficiency of that surface (225) when the surface is roughened. A light emitting surface (225) comprising layers of materials with different durability to the roughening process exhibits a higher light extraction efficiency than a substantially uniform light emitting surface exposed to the same roughening process. In a GaN-type light emitting device (200), a thin layer (240) of AlGaN material on or near the light-exiting surface (225) creates sharper features after etching compared to the features created by conventional etching of a surface comprising only GaN material.

Abstract: The structural characteristics of the light-exiting surface of a light emitting device are controlled so as to increase the light extraction efficiency of that surface when the surface is roughened. A light emitting surface comprising layers of materials with different durability to the roughening process exhibits a higher light extraction efficiency than a substantially uniform light emitting surface exposed to the same roughening process. In a GaN-type light emitting device, a thin layer of AlGaN material on or near the light-exiting surface creates sharper features after etching compared to the features created by conventional etching of a surface comprising only GaN material.

Abstract: The structural characteristics of the light-exiting surface of a light emitting device (200) are controlled so as to increase the light extraction efficiency of that surface (225) when the surface is roughened. A light emitting surface (225) comprising layers of materials with different durability to the roughening process exhibits a higher light extraction efficiency than a substantially uniform light emitting surface exposed to the same roughening process. In a GaN-type light emitting device (200), a thin layer (240) of AlGaN material on or near the light-exiting surface (225) creates sharper features after etching compared to the features created by conventional etching of a surface comprising only GaN material.

Abstract: A method according embodiments of the invention includes growing a semiconductor structure on a substrate including silicon. The semiconductor substrate includes an aluminum-containing layer in direct contact with the substrate, and a III-nitride light emitting layer disposed between an n-type region and a p-type region. The method further includes removing the substrate. After removing the substrate, a transparent material is formed in direct contact with the aluminum-containing layer. The transparent material is textured.

Abstract: A selective spacer for semiconductor and MEMS devices and method of manufacturing the same. In an embodiment, a selective spacer is formed adjacent to a first non-planar body having a greater sidewall height than a second non-planar semiconductor body in a self-aligned manner requiring no patterned etch operations. In a particular embodiment, a margin layer of a particular thickness is utilized to augment an existing structure and provide sufficient margin to protect a sidewall with a spacer that is first anisotropically defined and then isotropically defined. In another embodiment, the selective spacer formation prevents etch damage by terminating the anisotropic etch before a semiconductor surface is exposed.

Abstract: A high aspect ratio silicon structure comprises a silicon substrate (110) having a surface (111), an electrically insulating layer (120) over portions of the silicon substrate, a hardmask (130) over the electrically insulating layer, and a deep silicon trench (140) formed in the substrate. The deep silicon trench comprises a floor (141) and sidewalls (142) extending away from the floor, and the sidewalls are atomically smooth. In an embodiment, the atomically smooth sidewalls are achieved by providing a substrate having the deep silicon trench formed therein, forming a layer of water over the substrate and within the deep silicon trench, and exposing the substrate to a hydrogen fluoride vapor and to an ozone gas.

Abstract: A selective spacer for semiconductor and MEMS devices and method of manufacturing the same. In an embodiment, a selective spacer is formed adjacent to a first non-planar body having a greater sidewall height than a second non-planar semiconductor body in a self-aligned manner requiring no patterned etch operations. In a particular embodiment, a margin layer of a particular thickness is utilized to augment an existing structure and provide sufficient margin to protect a sidewall with a spacer that is first anisotropically defined and then isotropically defined. In another embodiment, the selective spacer formation prevents etch damage by terminating the anisotropic etch before a semiconductor surface is exposed.

Abstract: A method, as well as a computer program product that implements the method, is provided for user modeling, within a computer system, of a lifecycle of uniquely identified computer data objects that are members of a computer data object family. The method includes receiving a user-defined triggering event occurring in a software application system. The method also includes receiving user-defined permissible states for one or more object attributes that may be present for a uniquely identified computer data object that is a member of the data object family, as well as user-defined permissible transitions between the defined permissible states. The method also includes receiving a user-defined action to be performed on a uniquely identified computer data object that is a member of the computer data object family, when the user-defined triggering event occurs and causes a permissible state transition to occur.