Patents by Inventor Rakesh Cheerla

Rakesh Cheerla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200328192
    Abstract: A smart network interface controller (NIC) implemented using a stacked die configuration is provided. The NIC may include user-customizable networking circuits formed in a top programmable die and primitive network function blocks formed in a bottom application-specific integrated circuit (ASIC) die. The top programmable die may provide a flexible packet processing pipeline to facilitate efficient control and data communication between the user-customizable networking circuits and the primitive network function blocks. The bottom ASIC die may also include an array of memory blocks operable as lookup tables and intermediate buffers for other network processing circuitry in the NIC. A NIC configured in this way provides both performance, power, and area benefits and superior customer configurability.
    Type: Application
    Filed: June 26, 2020
    Publication date: October 15, 2020
    Applicant: Intel Corporation
    Inventors: Naveed Zaman, Aravind Dasu, Sreedhar Ravipalli, Rakesh Cheerla, Martin Horne