Patents by Inventor Rakesh Mehta
Rakesh Mehta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250139175Abstract: A smart spider and web scraping system with custom templates, artificial intelligence for custom attribute extraction, artificial intelligence for providing quick fixes for machine learning extracted web page data, and direct HTTP request extraction without crawling.Type: ApplicationFiled: October 24, 2024Publication date: May 1, 2025Applicant: Zyte Group LimitedInventors: Mikhail Korobov, Konstantin Lopukhin, Kevin Bernal, Javier Casas, Rakesh Mehta, Cristi Constantin, Iván Sánchez, Nikita Vostretsov, Taras Shevchenko
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Publication number: 20250006004Abstract: An electronic gaming system includes a processor configured to execute instructions, which when executed, cause the processor to at least receive a wager amount and a bingo card parameter from an electronic gaming machine (EGM) that is communicatively coupled to the electronic gaming system. The instructions may also cause the processor to determine, based upon the wager amount, a subset of a plurality of bingo card parameters and compare the received bingo card parameter to the subset of the plurality of bingo card parameters to determine whether the received bingo card parameter matches any bingo card parameter of the subset of the plurality of bingo card parameters, where each bingo card parameter of the plurality of bingo card parameters is associated with a progressive jackpot.Type: ApplicationFiled: September 13, 2024Publication date: January 2, 2025Inventors: Alok Trivedi, Shailendra Tomar, Rakesh Mehta, Jitin Garg
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Publication number: 20240427679Abstract: Described herein is a generic hardware/software communication (HSC) channel that facilitates the re-use of pre-silicon DPI methods to enable FPGA-based post-silicon validation. The HSC channel translates a DPI interface into a hardware FIFO based mechanism. This translation allows the reuse of the methods without having to re-implement the entire flow in pure hardware. The core logic for the transactor remains the same, while only a small layer of the transactor is converted into the FIFO based mechanism.Type: ApplicationFiled: June 27, 2024Publication date: December 26, 2024Applicant: Intel CorporationInventors: Renu Patle, Hanmanthrao Patli, Rakesh Mehta, Hagay Spector, Ivan Herrera Mejia, Fylur Rahman Sathakathulla, Gowtham Raj Karnam, Mohsin Ali, Sahar Sharabi, Abraham Halevi Fraenkel, Eyal Pniel, Ehud Cohn, Raghav Ramesh Lakshmi, Altug Koker
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Patent number: 12118852Abstract: An electronic gaming system includes a processor configured to execute instructions, which when executed, cause the processor to at least receive a wager amount and a bingo card parameter from an electronic gaming machine (EGM) that is communicatively coupled to the electronic gaming system. The instructions may also cause the processor to determine, based upon the wager amount, a subset of a plurality of bingo card parameters and compare the received bingo card parameter to the subset of the plurality of bingo card parameters to determine whether the received bingo card parameter matches any bingo card parameter of the subset of the plurality of bingo card parameters, where each bingo card parameter of the plurality of bingo card parameters is associated with a progressive jackpot.Type: GrantFiled: September 8, 2022Date of Patent: October 15, 2024Assignee: Aristocrat Technologies Australia Pty LimitedInventors: Alok Trivedi, Shailendra Tomar, Rakesh Mehta, Jitin Garg
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Publication number: 20240242570Abstract: An electronic gaming system includes a processor configured to execute instructions, which when executed, cause the processor to at least receive a wager amount from an electronic gaming machine (EGM), where the wager amount is associated with a player wager in a base bingo game played by a player of the EGM. The instructions also cause the processor to receive a bingo card parameter from the EGM, where the received bingo card parameter is associated with a bingo card provided to the player in the base bingo game, determine, based upon the wager amount, an award eligibility probability, and determine, based at least in part upon the award eligibility probability, whether the player is eligible to receive an award, and in response, compare the received bingo card parameter to a plurality of bingo card parameters, the plurality of bingo card parameters defining a paytable. Moreover, the instructions may cause the processor to determine, based upon the comparison, whether to provide the award to the player.Type: ApplicationFiled: April 1, 2024Publication date: July 18, 2024Inventors: Michael Casey, Shawn Lyons, Eldon Ideus, II, Eric Telaak, Alok Trivedi, Shailendra Tomar, Rakesh Mehta, Jitin Garg
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Patent number: 12038819Abstract: Described herein is a generic hardware/software communication (HSC) channel that facilitates the re-use of pre-silicon DPI methods to enable FPGA-based post-silicon validation. The HSC channel translates a DPI interface into a hardware FIFO based mechanism. This translation allows the reuse of the methods without having to re-implement the entire flow in pure hardware. The core logic for the transactor remains the same, while only a small layer of the transactor is converted into the FIFO based mechanism.Type: GrantFiled: June 14, 2022Date of Patent: July 16, 2024Assignee: Intel CorporationInventors: Renu Patle, Hanmanthrao Patli, Rakesh Mehta, Hagay Spector, Ivan Herrera Mejia, Fylur Rahman Sathakathulla, Gowtham Raj Karnam, Mohsin Ali, Sahar Sharabi, Abraham Halevi Fraenkel, Eyal Pniel, Ehud Cohn, Raghav Ramesh Lakshmi, Altug Koker
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Patent number: 11978315Abstract: An electronic gaming system includes a processor configured to execute instructions, which when executed, cause the processor to at least receive a wager amount from an electronic gaming machine (EGM), where the wager amount is associated with a player wager in a base bingo game played by a player of the EGM. The instructions also cause the processor to receive a bingo card parameter from the EGM, where the received bingo card parameter is associated with a bingo card provided to the player in the base bingo game, determine, based upon the wager amount, an award eligibility probability, and determine, based at least in part upon the award eligibility probability, whether the player is eligible to receive an award, and in response, compare the received bingo card parameter to a plurality of bingo card parameters, the plurality of bingo card parameters defining a paytable. Moreover, the instructions may cause the processor to determine, based upon the comparison, whether to provide the award to the player.Type: GrantFiled: June 10, 2021Date of Patent: May 7, 2024Assignee: Aristocrat Technologies Australia Pty LimitedInventors: Michael Casey, Shawn Lyons, Eldon Ideus, II, Eric Telaak, Alok Trivedi, Shailendra Tomar, Rakesh Mehta, Jitin Garg
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Publication number: 20230401132Abstract: Described herein is a generic hardware/software communication (HSC) channel that facilitates the re-use of pre-silicon DPI methods to enable FPGA-based post-silicon validation. The HSC channel translates a DPI interface into a hardware FIFO based mechanism. This translation allows the reuse of the methods without having to re-implement the entire flow in pure hardware. The core logic for the transactor remains the same, while only a small layer of the transactor is converted into the FIFO based mechanism.Type: ApplicationFiled: June 14, 2022Publication date: December 14, 2023Applicant: Intel CorporationInventors: Renu Patle, Hanmanthrao Patli, Rakesh Mehta, Hagay Spector, Ivan Herrera Mejia, Fylur Rahman Sathakathulla, Gowtham Raj Karnam, Mohsin Ali, Sahar Sharabi, Abraham Halevi Fraenkel, Eyal Pniel, Ehud Cohn, Raghav Ramesh Lakshmi, Altug Koker
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Publication number: 20230401130Abstract: One embodiment provides an apparatus comprising a circuit board; an active interposer coupled with the circuit board via a debug package, and a graphics processor die coupled with the active interposer via the debug package. The graphics processor die includes graphics processor resources configured to execute instructions for a multi-die system on chip (SoC) device and excludes functionality that is implemented in a separate due of the multi-die SoC. The apparatus includes a field-programmable gate array (FPGA) including hardware logic that is configurable to emulate functionality provided by the separate die of the multi-die SoC device, which enables silicon validation of the graphics processor die separately from other dies of the multi-die SoC.Type: ApplicationFiled: June 14, 2022Publication date: December 14, 2023Applicant: Intel CorporationInventors: Rakesh Mehta, Hanmanthrao Patli, Ivan Herrera Mejia, Raj Chandar Rasappan, Hagay Spector, Renu Patle, Fylur Rahman Sathakathulla, Ruchira Liyanage, Raju Kasturi, Fred Steinberg, Ananth Gopalakrishnan, Satish Venkatesan, Pradyumna Reddy Patnam, Suresh Pothukuchi, Tapan Ganpule, Atthar H. Mohammed, Altug Koker
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Patent number: 11715827Abstract: An all-solid-state battery comprises a lithium anode, a cathode, solid electrolyte and a protective layer between the solid electrolyte and the lithium anode. The protective layer comprises an ion-conducting material having an electrochemical stability window against lithium of at least 1.0 V, a lowest electrochemical stability being 0.0 V and a highest electrochemical stability being greater than 1.0 V. More particularly, when the solid electrolyte is LiSiCON, the electrochemical stability window is at least 1.5 V, the lowest electrochemical stability is 0.0 V and the highest electrochemical stability is greater than 1.5 V. When the solid electrolyte is sulfide-based, the electrochemical stability window is at least 2.0 V, the lowest electrochemical stability is 0.0 V and the highest electrochemical stability is greater than 2.0 V.Type: GrantFiled: February 8, 2021Date of Patent: August 1, 2023Assignee: Nissan North America, Inc.Inventors: Hideyuki Komatsu, Shigemasa Kuwata, Atsushi Ohma, Maarten Sierhuis, Xin Yang, Najamuddin Mirza Baig, Balachandran Gadaguntla Radhakrishnan, Shreyas Honrao, John Lawson, Mohit Rakesh Mehta
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Publication number: 20220415128Abstract: An electronic gaming system includes a processor configured to execute instructions, which when executed, cause the processor to at least receive a wager amount and a bingo card parameter from an electronic gaming machine (EGM) that is communicatively coupled to the electronic gaming system. The instructions may also cause the processor to determine, based upon the wager amount, a subset of a plurality of bingo card parameters and compare the received bingo card parameter to the subset of the plurality of bingo card parameters to determine whether the received bingo card parameter matches any bingo card parameter of the subset of the plurality of bingo card parameters, where each bingo card parameter of the plurality of bingo card parameters is associated with a progressive jackpot.Type: ApplicationFiled: September 8, 2022Publication date: December 29, 2022Inventors: Alok Trivedi, Shailendra Tomar, Rakesh Mehta, Jitin Garg
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Patent number: 11443595Abstract: An electronic gaming system includes a processor configured to execute instructions, which when executed, cause the processor to at least receive a wager amount and a bingo card parameter from an electronic gaming machine (EGM) that is communicatively coupled to the electronic gaming system. The instructions may also cause the processor to determine, based upon the wager amount, a subset of a plurality of bingo card parameters and compare the received bingo card parameter to the subset of the plurality of bingo card parameters to determine whether the received bingo card parameter matches any bingo card parameter of the subset of the plurality of bingo card parameters, where each bingo card parameter of the plurality of bingo card parameters is associated with a progressive jackpot.Type: GrantFiled: May 28, 2021Date of Patent: September 13, 2022Assignee: Aristocrat Technologies Australia Pty LimitedInventors: Alok Trivedi, Shailendra Tomar, Rakesh Mehta, Jitin Garg
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Publication number: 20220255078Abstract: An all-solid-state battery comprises a lithium anode, a cathode, solid electrolyte and a protective layer between the solid electrolyte and the lithium anode. The protective layer comprises an ion-conducting material having an electrochemical stability window against lithium of at least 1.0 V, a lowest electrochemical stability being 0.0 V and a highest electrochemical stability being greater than 1.0 V. More particularly, when the solid electrolyte is LiSiCON, the electrochemical stability window is at least 1.5 V, the lowest electrochemical stability is 0.0 V and the highest electrochemical stability is greater than 1.5 V. When the solid electrolyte is sulfide-based, the electrochemical stability window is at least 2.0 V, the lowest electrochemical stability is 0.0 V and the highest electrochemical stability is greater than 2.0 V.Type: ApplicationFiled: February 8, 2021Publication date: August 11, 2022Inventors: Hideyuki Komatsu, Shigemasa Kuwata, Atsushi Ohma, Maarten Sierhuis, Xin Yang, Najamuddin Mirza Baig, Balachandran Gadaguntla Radhakrishnan, Shreyas Honrao, John Lawson, Mohit Rakesh Mehta
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Patent number: 11403733Abstract: Various techniques are disclosed for systems and methods to provide image resolution enhancement. For example, a method includes: receiving an original image (e.g., a visible light image) of a scene comprising image pixels identified by pixel coordinates; resizing the original image to a larger size, where the resized image is divided into a first plurality of reference blocks; enhancing a resolution of the resized image by iteratively: injecting high frequency data into the resized image, extracting from the resized image a first plurality of matching blocks that meet a mutual similarity condition with respect to the reference block, and adjusting the high frequency data of the reference block based on a correlation between the reference block and the first plurality of matching blocks. A system configured to perform such a method is also disclosed.Type: GrantFiled: July 11, 2018Date of Patent: August 2, 2022Assignee: Teledyne FLIR, LLCInventors: Rakesh Mehta, Karen Egiazarian
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Patent number: 11178708Abstract: A system and method for routing of 5G mobile data traffic along a routing path in an Internetwork Packet Exchange (IPX) network having requisite Quality of Service (QoS). A proxy is deployed in the IPX network to intercept Session Create request and response messages exchanges between the home network and the visited network. The routing platform extracts Single-Network Slice Selection Assistance Information (S-NSSAI) attribute and uses this attribute and the geographic locations of the visited network and the home network to select a routing path in the IPX network having requisite QoS for the network slice use case. The routing platform uses layer-3 routing technique to anchor User Plane Function (UPF) Proxies deployed at different routing paths in the IPX network. Alternately, the routing platform uses layer-2 routing technique, with Software-Defined Networking (SDN) controller and SDN-switches to route traffic via the selected routing path in the IPX network.Type: GrantFiled: October 30, 2020Date of Patent: November 16, 2021Assignee: Syniverse Technologies, LLCInventors: Edward Yau, Huiyue Xu, Prashant Datar, Ravi Tandon, Rakesh Mehta
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Publication number: 20210304561Abstract: An electronic gaming system includes a processor configured to execute instructions, which when executed, cause the processor to at least receive a wager amount from an electronic gaming machine (EGM), where the wager amount is associated with a player wager in a base bingo game played by a player of the EGM. The instructions also cause the processor to receive a bingo card parameter from the EGM, where the received bingo card parameter is associated with a bingo card provided to the player in the base bingo game, determine, based upon the wager amount, an award eligibility probability, and determine, based at least in part upon the award eligibility probability, whether the player is eligible to receive an award, and in response, compare the received bingo card parameter to a plurality of bingo card parameters, the plurality of bingo card parameters defining a paytable. Moreover, the instructions may cause the processor to determine, based upon the comparison, whether to provide the award to the player.Type: ApplicationFiled: June 10, 2021Publication date: September 30, 2021Inventors: Michael Casey, Shawn Lyons, Eldon Ideus, II, Eric Telaak, Alok Trivedi, Shailendra Tomar, Rakesh Mehta, Jitin Garg
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Publication number: 20210287492Abstract: An electronic gaming system includes a processor configured to execute instructions, which when executed, cause the processor to at least receive a wager amount and a bingo card parameter from an electronic gaming machine (EGM) that is communicatively coupled to the electronic gaming system. The instructions may also cause the processor to determine, based upon the wager amount, a subset of a plurality of bingo card parameters and compare the received bingo card parameter to the subset of the plurality of bingo card parameters to determine whether the received bingo card parameter matches any bingo card parameter of the subset of the plurality of bingo card parameters, where each bingo card parameter of the plurality of bingo card parameters is associated with a progressive jackpot.Type: ApplicationFiled: May 28, 2021Publication date: September 16, 2021Inventors: Alok Trivedi, Shailendra Tomar, Rakesh Mehta, Jitin Garg
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Patent number: 11037403Abstract: An electronic gaming system includes a processor configured to execute instructions, which when executed, cause the processor to at least receive a wager amount from an electronic gaming machine (EGM), where the wager amount is associated with a player wager in a base bingo game played by a player of the EGM. The instructions also cause the processor to receive a bingo card parameter from the EGM, where the received bingo card parameter is associated with a bingo card provided to the player in the base bingo game, determine, based upon the wager amount, an award eligibility probability, and determine, based at least in part upon the award eligibility probability, whether the player is eligible to receive an award, and in response, compare the received bingo card parameter to a plurality of bingo card parameters, the plurality of bingo card parameters defining a paytable. Moreover, the instructions may cause the processor to determine, based upon the comparison, whether to provide the award to the player.Type: GrantFiled: July 10, 2019Date of Patent: June 15, 2021Assignee: Aristocrat Technologies Australia Pty LimitedInventors: Michael Casey, Shawn Lyons, Eldon Ideus, II, Eric Telaak, Alok Trivedi, Shailendra Tomar, Rakesh Mehta, Jitin Garg
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Patent number: 11024121Abstract: An electronic gaming system includes a processor configured to execute instructions, which when executed, cause the processor to at least receive a wager amount and a bingo card parameter from an electronic gaming machine (EGM) that is communicatively coupled to the electronic gaming system. The instructions may also cause the processor to determine, based upon the wager amount, a subset of a plurality of bingo card parameters and compare the received bingo card parameter to the subset of the plurality of bingo card parameters to determine whether the received bingo card parameter matches any bingo card parameter of the subset of the plurality of bingo card parameters, where each bingo card parameter of the plurality of bingo card parameters is associated with a progressive jackpot.Type: GrantFiled: July 10, 2019Date of Patent: June 1, 2021Assignee: Aristocrat Technologies Australia Pty LimitedInventors: Alok Trivedi, Shailendra Tomar, Rakesh Mehta, Jitin Garg
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Publication number: 20210098084Abstract: A method for screening materials may include obtaining materials from a database. The method may include screening the materials to obtain a one or more screened materials. The method may include generating a training set based on the screened materials, validated experimental data, or both. The method may include establishing a machine learning screening model based on the training set, one or more target parameters, or both. The method may include applying the machine learning screening model to uncharacterized materials. The method may include outputting one or more materials having characteristics matching the target parameters.Type: ApplicationFiled: September 30, 2019Publication date: April 1, 2021Inventors: Akiyoshi Park, Taehee Han, Shigemasa Kuwata, Maarten Sierhuis, Xin Yang, Atsushi Ohma, Balachandran Gadaguntla Radhakrishnan, Shreyas Honrao, John Lawson, Najamuddin Mirza Baig, Mohit Rakesh Mehta