Patents by Inventor Rakshit Tikoo

Rakshit Tikoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11513691
    Abstract: Systems and methods are disclosed for providing parallel data transfer. In certain embodiments, a data storage device includes a non-volatile memory and a controller configured to: receive a command from a host to obtain a file stored in the non-volatile memory; determine a plurality of channels available between the host and the data storage device; dynamically divide the file into a plurality of chunks based at least in part on the plurality of channels; perform load balancing to determine a first chunk of the plurality of chunks to be sent over a first channel of the plurality of channels and at least a second chunk of the plurality of chunks to be sent over a second channel of the plurality of channels; and simultaneously transmit the first chunk over the first channel and the second chunk over the second channel.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: November 29, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Niraj Srimal, Adarsh Sreedhar, Rakshit Tikoo, Aditya Gadgil
  • Patent number: 11455244
    Abstract: Aspects of a storage device including a memory and a controller are provided which reduces or eliminates garbage collection in zoned namespace (ZNS) architectures by mapping zones to sub-blocks of blocks of the memory. Each zone includes a plurality of logical addresses. The controller determines a number of open zones, and maps the open zones to the sub-blocks in response to the number of open zones meeting a threshold. Thus, larger numbers of open blocks typically present in ZNS may be reduced, and increased block sizes due to scaling may be accommodated in ZNS. In some aspects, the controller receives a request from a host device to write data associated with the zones in sub-blocks, and maps each of the zones to at least one of the sub-blocks in response to the request. The request may indicate zones are partially unused. Thus, out of zone conditions may also be avoided.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: September 27, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Rakshit Tikoo, Adarsh Sreedhar, Lovleen Arora, Niraj Srimal
  • Patent number: 11442666
    Abstract: A storage system has a memory with primary and secondary blocks. Data is stored redundantly in the primary and secondary memory blocks but in a different programming order. For example, data is programmed in the first memory block starting at a first wordline and ending at a last wordline, while data is programmed in the second memory block starting at the last wordline and ending at the first wordline.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: September 13, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Yogendra Singh Sikarwar, Ankit Naghate, Milind Giradkar, Rakshit Tikoo
  • Publication number: 20220221990
    Abstract: Systems and methods are disclosed for providing parallel data transfer. In certain embodiments, a data storage device includes a non-volatile memory and a controller configured to: receive a command from a host to obtain a file stored in the non-volatile memory; determine a plurality of channels available between the host and the data storage device; dynamically divide the file into a plurality of chunks based at least in part on the plurality of channels; perform load balancing to determine a first chunk of the plurality of chunks to be sent over a first channel of the plurality of channels and at least a second chunk of the plurality of chunks to be sent over a second channel of the plurality of channels; and simultaneously transmit the first chunk over the first channel and the second chunk over the second channel.
    Type: Application
    Filed: February 22, 2021
    Publication date: July 14, 2022
    Inventors: Niraj Srimal, Adarsh Sreedhar, Rakshit Tikoo, Aditya Gadgil
  • Publication number: 20220155999
    Abstract: A storage system has a memory with primary and secondary blocks. Data is stored redundantly in the primary and secondary memory blocks but in a different programming order. For example, data is programmed in the first memory block starting at a first wordline and ending at a last wordline, while data is programmed in the second memory block starting at the last wordline and ending at the first wordline.
    Type: Application
    Filed: February 23, 2021
    Publication date: May 19, 2022
    Applicant: Western Digital Technologies, Inc.
    Inventors: Yogendra Singh Sikarwar, Ankit Naghate, Milind Giradkar, Rakshit Tikoo
  • Publication number: 20220075716
    Abstract: Aspects of a storage device including a memory and a controller are provided which reduces or eliminates garbage collection in zoned namespace (ZNS) architectures by mapping zones to sub-blocks of blocks of the memory. Each zone includes a plurality of logical addresses. The controller determines a number of open zones, and maps the open zones to the sub-blocks in response to the number of open zones meeting a threshold. Thus, larger numbers of open blocks typically present in ZNS may be reduced, and increased block sizes due to scaling may be accommodated in ZNS. In some aspects, the controller receives a request from a host device to write data associated with the zones in sub-blocks, and maps each of the zones to at least one of the sub-blocks in response to the request. The request may indicate zones are partially unused. Thus, out of zone conditions may also be avoided.
    Type: Application
    Filed: February 19, 2021
    Publication date: March 10, 2022
    Inventors: Rakshit Tikoo, Adarsh Sreedhar, Lovleen Arora, Niraj Srimal
  • Patent number: 11231883
    Abstract: A memory device includes logic to detect the last page written in multi-plane non-volatile memory. The device includes a memory array, and a storage controller. The memory array includes multiple planes and multiple word lines operable on the memory array. The storage controller is configured to divide the word lines into contiguous sub-ranges and assign a subset of the word lines to boundaries of the sub-ranges. Each word line of the subset of word lines is assigned to a page in a different one of the memory planes. The controller operates the subset of word lines to sense a page programmed or erased state from each of the memory planes in parallel.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: January 25, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ankit Vijay Naghate, Rakshit Tikoo, Yogendra Singh Sikarwar, Ashish Singla, Arun Thandapani, Lee M Gavens
  • Publication number: 20220004336
    Abstract: A memory device includes logic to detect the last page written in multi-plane non-volatile memory. The device includes a memory array, and a storage controller. The memory array includes multiple planes and multiple word lines operable on the memory array. The storage controller is configured to divide the word lines into contiguous sub-ranges and assign a subset of the word lines to boundaries of the sub-ranges. Each word line of the subset of word lines is assigned to a page in a different one of the memory planes. The controller operates the subset of word lines to sense a page programmed or erased state from each of the memory planes in parallel.
    Type: Application
    Filed: July 2, 2020
    Publication date: January 6, 2022
    Applicant: Western Digital Technologies, Inc.
    Inventors: Ankit Vijay Naghate, Rakshit Tikoo, Yogendra Singh Sikarwar, Ashish Singla, Arun Thandapani, Lee M. Gavens
  • Patent number: 11036407
    Abstract: A storage system and method for smart folding are provided. In one example, the storage system has a memory with a plurality of single level cell (SLC) blocks and a multi-level cell (MLC) block. The MLC block has a plurality of pages, each with a different sense time. The storage system tracks a read count of each of the plurality of SLC blocks and determines how to fold the plurality of SLC blocks into the plurality of pages based on the read count of each of the plurality of SLC blocks and the sense time of each of the plurality of pages. In this way, SLC blocks with higher read counts can be folded into pages that have faster sense times.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: June 15, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Rakshit Tikoo, Ankit Naghate, Yogendra Singh Sikarwar, Arun Thandapani