Abstract: Embodiments of current feedback circuits for Direct Current (DC)-DC converters and methods for operating current feedback circuits for DC-DC converters are described. In one embodiment, a current feedback circuit for a DC-DC converter includes a current replication circuit configured to provide current feedback to the DC-DC converter based on an on-time of the DC-DC converter and an alternating current (AC)-coupling circuit configured to add the current feedback to a regulation circuit of the current feedback circuit and to remove a DC voltage from the current replication circuit. The regulation circuit includes a filter circuit configured to compensate for an offset of an output voltage of the DC-DC converter caused by the current feedback. Other embodiments are also described.

Abstract: Embodiments of current feedback circuits for Direct Current (DC)-DC converters and methods for operating current feedback circuits for DC-DC converters are described. In one embodiment, a current feedback circuit for a DC-DC converter includes a current replication circuit configured to provide current feedback to the DC-DC converter based on an on-time of the DC-DC converter and an alternating current (AC)-coupling circuit configured to add the current feedback to a regulation circuit of the current feedback circuit and to remove a DC voltage from the current replication circuit. The regulation circuit includes a filter circuit configured to compensate for an offset of an output voltage of the DC-DC converter caused by the current feedback. Other embodiments are also described.

Abstract: In one embodiment, an apparatus includes a plurality of photovoltaic units having respective pairs of first and second power terminals connected in series. Each photovoltaic unit in the series includes a bypass switch connected in parallel with the photovoltaic current source of the photovoltaic unit. The bypass switch is configured to provide a bypass of the photovoltaic current source in response to a respective switch control signal. A control circuit determines electrical characteristics of the one or more of the plurality of photovoltaic units by operating the bypass switches of one or more of the photovoltaic units in an open state and operating the bypass switches of the other ones of the photovoltaic units in a closed state. Electrical characteristics exhibited by the series connection of the plurality of photovoltaic units are measured using a detection circuit.

Abstract: In an embodiment of a converter, a first oscillator provides switching signals for switching between charging and discharging of a capacitor, and a second oscillator is configured to add an offset voltage or a feedback-current-dependent voltage to a sawtooth waveform generated by the second oscillator switched in synchronism with the first oscillator.

Abstract: In one embodiment, an apparatus includes a plurality of photovoltaic units having respective pairs of first and second power terminals connected in series. Each photovoltaic unit in the series includes a bypass switch connected in parallel with the photovoltaic current source of the photovoltaic unit. The bypass switch is configured to provide a bypass of the photovoltaic current source in response to a respective switch control signal. A control circuit determines electrical characteristics of the one or more of the plurality of photovoltaic units by operating the bypass switches of one or more of the photovoltaic units in an open state and operating the bypass switches of the other ones of the photovoltaic units in a closed state. Electrical characteristics exhibited by the series connection of the plurality of photovoltaic units are measured using a detection circuit.

Abstract: A sawtooth generator circuit comprises a first triangular waveform generator with equal ramp up and ramp down rates and a second triangular waveform generator with equal ramp up and ramp down rates and which are equal to the ramp up and ramp down rates of the first triangular waveform generator. The first and second triangular waveform generators are controlled to be 180 degrees out of phase. A switching arrangement alternately switches the increasing or decreasing ramps of the first and second triangular waveform generators to an output of the sawtooth generator circuit. The invention provides a sawtooth generator circuit which is suitable for high frequency applications, with low current consumption and low ground bounce. A very fast falling edge can be obtained.

Abstract: A sawtooth generator circuit comprises a first triangular waveform generator with equal ramp up and ramp down rates and a second triangular waveform generator with equal ramp up and ramp down rates and which are equal to the ramp up and ramp down rates of the first triangular waveform generator. The first and second triangular waveform generators are controlled to be 180 degrees out of phase. A switching arrangement alternately switches the increasing or decreasing ramps of the first and second triangular waveform generators to an output of the sawtooth generator circuit. The invention provides a sawtooth generator circuit which is suitable for high frequency applications, with low current consumption and low ground bounce. A very fast falling edge can be obtained.

Abstract: In an embodiment of a converter, a first oscillator provides switching signals for switching between charging and discharging of a capacitor, and a second oscillator is configured to add an offset voltage or a feedback-current-dependent voltage to a sawtooth waveform generated by the second oscillator switched in synchronism with the first oscillator.

Abstract: A semiconductor component comprising at least one lateral bipolar power transistor which is composed of at least one group of single transistors with a common collector-, base- and emitter zone, which are parallel connected by three conductor track systems which bring together the emitter-, base- and collector currents of each of the single transistors; and each single transistor comprises an emitter region having an emitter-contact zone with an emitter contact, at least one active emitter zone and a connection zone between the contact zone and the active zone, a base region having a base-contact zone with a base contact and an internal base series resistor, and a collector region, said internal base series resistor being a structured semiconductor region comprising at least two ring segments, which is connected to the base contact zone and to the base contact.

Abstract: The invention relates to a circuit arrangement for pulse generation, having a capacitor, to which a charging current and a discharging current may be supplied in succession. To generate the charging current and the discharging current, there are provided a current source, a first current mirror circuit and a second current mirror circuit complementary to the first current mirror circuit. The current mirror circuits each comprise a plurality of output transistors, which each constitute an output stage for the charging and discharging current, which is connected to a regulator, and for a circuit for controlling the tail current of a differential amplifier forming the regulator. A current output of the differential amplifier is connected to the output of the second current mirror circuit.

Abstract: The invention relates to a circuit arrangement for pulse generation, having a capacitor, to which a charging current and a discharging current may be supplied in succession. To generate the charging current and the discharging current, there are provided a current source, a first current mirror circuit and a second current mirror circuit complementary to the first current mirror circuit. The current mirror circuits each comprise a plurality of output transistors, which each constitute an output stage for the charging and discharging current, which is connected to a regulator, and for a circuit for controlling the tail current of a differential amplifier forming the regulator. A current output of the differential amplifier is connected to the output of the second current mirror circuit.

Abstract: In an arrangement for coupling out an output current from a load current by a load (2), particularly a deflection coil of a cathode ray tube by means of an output resistor (4), which arrangement comprises an output current mirror (9, 10, 11), in which a control value in the form of the difference between two voltages dropping across two resistors (35, 36) for controlling the load current is generated and in which a reference current bank (12) is provided with a current mirror circuit whose input receives a constant current for generating constant currents, a minimal temperature dependence is obtained in that the output current is coupled to the emitter of at least a first output transistor (10) and at least a second output transistor (11) of the output current mirror, in that the reference current bank (12) supplies a first reference current which, together with the output current, is coupled to the emitter of the first output transistor (10) and the second output transistor (11) of the output current mirror,

Abstract: The binary values of the data word to be converted in a widely used type of D/A converter are supplied to a series of stages in which binarily stepped currents are supplied to a common output or derived therefrom, or are conducted to a second common output. To control the current switch, each stage comprises a flipflop in which the binary value to be converted is stored. Integration processes are often used in the integration of analog circuits by means of which digital circuit components cannot be usefully realized, for example, in the IIL technology. In the flipflop comprising cross-coupled transistors, the emitters are connected to a reference voltage which lies between ground potential and the supply voltage so as to obtain a favorable conversion of the digital signals for triggering the current switch. This renders it possible to connect the collectors of the transistors of the flipflop directly to the bases of the current switch.

Abstract: A controlled power supply source is described, which has a parallel control member having a controllable semiconductor component whose load path is arranged between output terminals of the power supply source and whose control input is connected to an output of a control device, the control device having a reference input for supplying a reference voltage. The control device has a control amplifier which is fed from a current bank having at least one constant current source, an actual value input of said control amplifier receiving the voltage between the output terminals of the power supply source, and a nominal value input receiving the reference voltage from the reference input of the control device.

Abstract: A current mirror arrangement comprising at least one input transistor of a first conductivity type, whose emitter is connected to a current supply line and whose collector is arranged to carry an input current. At least one output transistor of the first conductivity type has its emitter connected to the current supply line and its base to the base of the input transistor and from whose collector an output current can be taken. A follower transistor of the first conductivity type has its emitter connected to the bases of the input transistor and the output transistor and its base to the collector of the input transistor, and has its collector coupled to a reference potential. In order to ensure a well-defined load of the current supply line in any operating condition, the current mirror arrangement also includes a control transistor of a second conductivity type opposite to the first conductivity type.

Abstract: A circuit for testing the leakage resistance of a circuit point. Particularly in the case of circuits where safety is important, a circuit point, particularly an output terminal of an integrated circuit, should be tested for a leakage resistance relative to ground and/or a voltage to provide an early detection of an imminent failure condition. To this end, at least one test current is fed into the circuit point and the voltage at the circuit point is monitored by means of a comparator. When the leakage resistance decreases below a permissible value the voltage at the circuit point decreases, which can be detected by the comparator. For monitoring a leakage resistance relative to both poles two opposite test currents are applied and the comparator is constructed as a window comparator.