Abstract: A multi-channel architecture comprising a central facility that is under clock control of a central facility's clock signal, and a central transfer clock generator adapted for deriving a central transfer clock signal from the central facility's clock signal. The multi-channel architecture further comprises a set of n channels, with n being a natural number, wherein each channel is under clock control of one out of a plurality of clock signals. Each of the channels comprises a channel transfer clock generator adapted for deriving a channel transfer clock signal from a clock signal of the respective channel, wherein the central facility's clock signal and the clock signals of the channels comprise at least two different clock signals. The transfer clock period of the central transfer clock signal is substantially equal to each of the transfer clock periods of the channel transfer clock signals.

Abstract: The invention provides an apparatus adapted for supplying a plurality of clock signals. The apparatus comprises a set of clock signal circuits for generating m clock signals of at least two different signal periods, with m being a natural number, and a superperiod signal-generating unit adapted for deriving, from a dedicated clock signal of said set of clock signals, a first superperiod signal. The signal period of said first superperiod signal is a common multiple of the clock signals' signal periods.

Abstract: A multi-channel architecture comprising a central facility that is under clock control of a central facility's clock signal, and a central transfer clock generator adapted for deriving a central transfer clock signal from the central facility's clock signal. The multi-channel architecture further comprises a set of n channels, with n being a natural number, wherein each channel is under clock control of one out of a plurality of clock signals. Each of the channels comprises a channel transfer clock generator adapted for deriving a channel transfer clock signal from a clock signal of the respective channel, wherein the central facility's clock signal and the clock signals of the channels comprise at least two different clock signals. The transfer clock period of the central transfer clock signal is substantially equal to each of the transfer clock periods of the channel transfer clock signals.

Abstract: The invention provides an apparatus adapted for supplying a plurality of clock signals. The apparatus comprises a set of clock signal circuits for generating m clock signals of at least two different signal periods, with m being a natural number, and a superperiod signal-generating unit adapted for deriving, from a dedicated clock signal of said set of clock signals, a first superperiod signal. The signal period of said first superperiod signal is a common multiple of the clock signals' signal periods.

Abstract: Described is a computer system having a multi-channel architecture wherein a plurality of individual channels, each having a respective channel memory and being connected by a bus. According to the invention, loading data, and preferably sequential data, into a channel memory of one of the plurality of individual channels is accomplished by (a) loading data into the channel memory to be loaded; (b) distributing further data which is to be loaded into the channel memory to be loaded into another channel memory of another one of the plurality of individual channels; and (c) reloading the data from the channel memory of the other one of the plurality of individual channels to the channel memory to be loaded via the bus. The invention is preferably used in a testing system, such as an IC tester.