Patents by Inventor Ralf Zedlitz

Ralf Zedlitz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7022209
    Abstract: A PVD method and a PVD apparatus use a rotating magnetic field in order to increase the yield. The magnetic field is provided such that it essentially vanishes, at least in a time average, outside a rotation axis of the magnetic field in sectors of the target region of the PVD apparatus. In this manner the PVD method and the PVD apparatus achieve a uniform coating.
    Type: Grant
    Filed: July 16, 2003
    Date of Patent: April 4, 2006
    Assignee: Infineon Technologies AG
    Inventors: Winfried Sabisch, Alfred Kersch, Georg Schulze-Icking, Thomas Witke, Ralf Zedlitz
  • Patent number: 6784553
    Abstract: A semiconductor device and a method for manufacturing the semiconductor device with a self-aligned contact, is described. A first conductor and a second conductor are formed on the surface of the semiconductor substrate. The first conductor and the second conductor are encapsulated with a first encapsulation and a second encapsulation, respectively. The first encapsulation and the second encapsulation contain titanium oxide, boron nitride, silicon carbide, magnesium oxide or carbon. The first encapsulation and the second encapsulation are suitable as a self-aligning etch mask for etching a self-aligned contact hole between the first conductor and the second conductor.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: August 31, 2004
    Assignee: Infineon Technologies SC300 GmbH & Co. KG
    Inventors: Ralf Zedlitz, Bruno Spuler
  • Patent number: 6693022
    Abstract: Doped polysilicon layers and layered polysilicon structures are produced, and the layers and layered structures are structured. The doping is distinguished by the fact that the doping compound is added as a process gas during the chemical vapor deposition of the polysilicon to define the doping profile. The feed of dopant to the process gas is stopped toward the end of the vapor deposition, with the result that a boundary layer of undoped silicon is deposited. As a result, a favorable surface quality and better adhesion to a neighboring layer is obtained. The structuring process comprises an at least three-step etching process in which a fluorine containing gas is used for etching in a first step, a chlorine-containing gas is used for etching in a second step and a bromine-containing gas is used for etching in a third step. The invention also encompasses wafers and semiconductor chips produced with the novel doping and/or structuring method.
    Type: Grant
    Filed: August 23, 2002
    Date of Patent: February 17, 2004
    Assignee: Infineon Technologies AG
    Inventors: Joerg Dreybrodt, Dirk Drescher, Ralf Zedlitz, Stephan Wege
  • Publication number: 20040011640
    Abstract: A PVD method and a PVD apparatus use a rotating magnetic field in order to increase the yield. The magnetic field is provided such that it essentially vanishes, at least in a time average, outside a rotation axis of the magnetic field in sectors of the target region of the PVD apparatus. In this manner the PVD method and the PVD apparatus achieve a uniform coating.
    Type: Application
    Filed: July 16, 2003
    Publication date: January 22, 2004
    Inventors: Winfried Sabisch, Alfred Kersch, Georg Schulze-Icking, Thomas Witke, Ralf Zedlitz
  • Publication number: 20030082031
    Abstract: A wafer handling device comprises metrology equipment (410, 420, 430, 440, 450, 460) for testing selected wafers as well as a stationary wafer storage system (300). The stationary wafer storage system (300) has a buffer (310) to store wafers and a load-and-unload station (320) to transfer selected wafers between the buffer (310) and wafer transport means (330). The wafer transport means are provided for transferring selected wafers between the load-and-unload station (320) and the metrology equipment (410, 420, 430, 440, 450, 460).
    Type: Application
    Filed: October 30, 2001
    Publication date: May 1, 2003
    Inventors: Olivier Vatel, Iraj Shahvandi, Dirk Aderhold, Peggy John, Ralf Zedlitz
  • Publication number: 20030017684
    Abstract: Doped polysilicon layers and layered polysilicon structures are produced, and the layers and layered structures are structured. The doping is distinguished by the fact that the doping compound is added as a process gas during the chemical vapor deposition of the polysilicon to define the doping profile. The feed of dopant to the process gas is stopped toward the end of the vapor deposition, with the result that a boundary layer of undoped silicon is deposited. As a result, a favorable surface quality and better adhesion to a neighboring layer is obtained. The structuring process comprises an at least three-step etching process in which a fluorine containing gas is used for etching in a first step, a chlorine-containing gas is used for etching in a second step and a bromine-containing gas is used for etching in a third step. The invention also encompasses wafers and semiconductor chips produced with the novel doping and/or structuring method.
    Type: Application
    Filed: August 23, 2002
    Publication date: January 23, 2003
    Applicant: Infineon Technologies AG
    Inventors: Joerg Dreybrodt, Dirk Drescher, Ralf Zedlitz, Stephan Wege
  • Publication number: 20020187630
    Abstract: A semiconductor device and a method for manufacturing the semiconductor device with a self-aligned contact, is described. A first conductor and a second conductor are formed on the surface of the semiconductor substrate. The first conductor and the second conductor are encapsulated with a first encapsulation and a second encapsulation, respectively. The first encapsulation and the second encapsulation contain titanium oxide, boron nitride, silicon carbide, magnesium oxide or carbon. The first encapsulation and the second encapsulation are suitable as a self-aligning etch mask for etching a self-aligned contact hole between the first conductor and the second conductor.
    Type: Application
    Filed: June 11, 2002
    Publication date: December 12, 2002
    Inventors: Ralf Zedlitz, Bruno Spuler
  • Patent number: 6479373
    Abstract: Doped polysilicon layers and layered polysilicon structures are produced, and the layers and layered structures are structured. The doping is distinguished by the fact that the doping compound is added as a process gas during the chemical vapor deposition of the polysilicon to define the doping profile. The feed of dopant to the process gas is stopped toward the end of the vapor deposition, with the result that a boundary layer of undoped silicon is deposited. As a result, a favorable surface quality and better adhesion to a neighboring layer is obtained. The structuring process comprises an at least three-step etching process in which a fluorine containing gas is used for etching in a first step, a chlorine-containing gas is used for etching in a second step and a bromine-containing, gas is used for etching in a third step. The invention also encompasses wafers and semiconductor chips produced with the novel doping and/or structuring method.
    Type: Grant
    Filed: June 19, 2001
    Date of Patent: November 12, 2002
    Assignee: Infineon Technologies AG
    Inventors: Joerg Dreybrodt, Dirk Drescher, Ralf Zedlitz, Stephan Wege
  • Patent number: 6362098
    Abstract: In a CVD chamber (120) having a chuck (122) to hold a semiconductor substrate (100) and having a plasma generator (121) to generate a plasma (125), a trench in the substrate is filled with dielectric material from ions (126) of the plasma. The ions are forced to move in a direction (127) that is substantially perpendicular to the surface of the substrate by a pulsed unidirectional voltage between the plasma generator and the substrate, by a circular magnetic field, or by a combination of both fields.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: March 26, 2002
    Assignees: Motorola, Inc., Semiconductor 300 GmbH & Co. KG, Infineon Technologies AG
    Inventors: Terry Alan Breeden, Iraj Eric Shahvandi, Michael Thomas Tucker, Olivier Gerard Marc Vatel, Karl Emerson Mautz, Ralf Zedlitz
  • Publication number: 20020016044
    Abstract: Doped polysilicon layers and layered polysilicon structures are produced, and the layers and layered structures are structured. The doping is distinguished by the fact that the doping compound is added as a process gas during the chemical vapor deposition of the polysilicon to define the doping profile. The feed of dopant to the process gas is stopped toward the end of the vapor deposition, with the result that a boundary layer of undoped silicon is deposited. As a result, a favorable surface quality and better adhesion to a neighboring layer is obtained. The structuring process comprises an at least three-step etching process in which a fluorine containing gas is used for etching in a first step, a chlorine-containing gas is used for etching in a second step and a bromine-containing gas is used for etching in a third step. The invention also encompasses wafers and semiconductor chips produced with the novel doping and/or structuring method.
    Type: Application
    Filed: June 19, 2001
    Publication date: February 7, 2002
    Inventors: Joerg Dreybrodt, Dirk Drescher, Ralf Zedlitz, Stephan Wege