Patents by Inventor Ralph D. Moore
Ralph D. Moore has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11764204Abstract: Herein disclosed are systems and circuitry for protecting against overdrive and electrostatic discharge. For example, protection circuitry may include field effect transistors to discharge overdrive outside of an operational voltage range of a circuit in some embodiments to prevent damage to the circuit. Further, the protection circuitry may utilize diode features inherent in the field effect transistors to protect against electrostatic discharge in some embodiments. The circuitry may be implemented in radio frequency sampling analog-to-digital converters and can provide for single-ended signal input and/or output for the analog-to-digital converters.Type: GrantFiled: June 18, 2020Date of Patent: September 19, 2023Assignee: Analog Devices, Inc.Inventors: Ralph D. Moore, Franklin M. Murden, Peter Delos, Srivatsan Parthasarathy, Javier Salcedo, John Guido
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Patent number: 11658621Abstract: Provided herein are apparatus and methods for a multi-stage signal-processing circuit. The signal-processing circuit can include multiple configurable stages that can be cascaded and configured to process an input signal. Control circuitry can be used to select an output of the configurable stages. Serial data can be recovered with good signal integrity using a signal monitor with the configurable stages by virtually placing the signal monitor on a buffered output node.Type: GrantFiled: March 25, 2020Date of Patent: May 23, 2023Assignee: Analog Devices, Inc.Inventors: Ralph D. Moore, Jesse Bankman
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Publication number: 20210398968Abstract: Herein disclosed are systems and circuitry for protecting against overdrive and electrostatic discharge. For example, protection circuitry may include field effect transistors to discharge overdrive outside of an operational voltage range of a circuit in some embodiments to prevent damage to the circuit. Further, the protection circuitry may utilize diode features inherent in the field effect transistors to protect against electrostatic discharge in some embodiments. The circuitry may be implemented in radio frequency sampling analog-to-digital converters and can provide for single-ended signal input and/or output for the analog-to-digital converters.Type: ApplicationFiled: June 18, 2020Publication date: December 23, 2021Applicant: Analog Devices, Inc.Inventors: Ralph D. MOORE, Franklin M. MURDEN, Peter DELOS, Srivatsan PARTHASARATHY, Javier SALCEDO, John GUIDO
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Patent number: 10911058Abstract: Multiplying digital-to-analog converter (MDACs) are implemented in pipelined ADCs to generate an analog output being fed to a subsequent stage. A switched capacitor MDAC can be implemented by integrating a capacitor digital-to-analog converter (DAC) with charge pump gain circuitry. The capacitor DAC can implement the DAC functionality while the charge pump gain circuitry can implement subtraction and amplification. The resulting switched capacitor MDAC can leverage strengths of nanometer process technologies, i.e., very good switches and highly linear capacitors, to achieve practical pipelined ADCs. Moreover, the switched capacitor MDAC has many benefits over other approaches for implementing the MDAC.Type: GrantFiled: January 19, 2020Date of Patent: February 2, 2021Assignee: ANALOG DEVICES, INC.Inventor: Ralph D. Moore
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Patent number: 10873336Abstract: Improved track and hold (T/H) circuits can help analog-to-digital converters (ADCs) achieve higher performance and lower power consumption. The improved T/H circuits can drive high speed and interleaved ADCs, and the design of the circuits enable additive and multiplicative pseudo-random dither signals to be injected in the T/H circuits. The dither signals can be used to calibrate (e.g., linearize) the T/H circuits and the ADC(s). In addition, the dither signal can be used to dither any remaining non-linearity, and to calibrate offset/gain mismatches in interleaved ADCs. The T/H circuit design also can integrate an amplifier in the T/H circuit, which can be used to improve the signal-to-noise ratio (SNR) of the ADC or to act as a variable gain amplifier (VGA) in front of the ADC.Type: GrantFiled: February 19, 2020Date of Patent: December 22, 2020Assignee: ANALOG DEVICES, INC.Inventors: Ahmed Mohamed Abdelatty Ali, Frank Murden, Peter Delos, Ralph D. Moore
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Publication number: 20200321926Abstract: Provided herein are apparatus and methods for a multi-stage signal-processing circuit. The signal-processing circuit can include multiple configurable stages that can be cascaded and configured to process an input signal. Control circuitry can be used to select an output of the configurable stages. Serial data can be recovered with good signal integrity using a signal monitor with the configurable stages by virtually placing the signal monitor on a buffered output node.Type: ApplicationFiled: March 25, 2020Publication date: October 8, 2020Inventors: Ralph D. Moore, Jesse Bankman
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Publication number: 20200195265Abstract: Improved track and hold (T/H) circuits can help analog-to-digital converters (ADCs) achieve higher performance and lower power consumption. The improved T/H circuits can drive high speed and interleaved ADCs, and the design of the circuits enable additive and multiplicative pseudo-random dither signals to be injected in the T/H circuits. The dither signals can be used to calibrate (e.g., linearize) the T/H circuits and the ADC(s). In addition, the dither signal can be used to dither any remaining non-linearity, and to calibrate offset/gain mismatches in interleaved ADCs. The T/H circuit design also can integrate an amplifier in the T/H circuit, which can be used to improve the signal-to-noise ratio (SNR) of the ADC or to act as a variable gain amplifier (VGA) in front of the ADC.Type: ApplicationFiled: February 19, 2020Publication date: June 18, 2020Applicant: Analog Devices, Inc.Inventors: Ahmed Mohamed Abdelatty ALI, Frank MURDEN, Peter DELOS, Ralph D. MOORE
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Publication number: 20200153445Abstract: Multiplying digital-to-analog converter (MDACs) are implemented in pipelined ADCs to generate an analog output being fed to a subsequent stage. A switched capacitor MDAC can be implemented by integrating a capacitor digital-to-analog converter (DAC) with charge pump gain circuitry. The capacitor DAC can implement the DAC functionality while the charge pump gain circuitry can implement subtraction and amplification. The resulting switched capacitor MDAC can leverage strengths of nanometer process technologies, i.e., very good switches and highly linear capacitors, to achieve practical pipelined ADCs. Moreover, the switched capacitor MDAC has many benefits over other approaches for implementing the MDAC.Type: ApplicationFiled: January 19, 2020Publication date: May 14, 2020Applicant: Analog Devices, Inc.Inventor: Ralph D. MOORE
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Patent number: 10608600Abstract: Provided herein are apparatus and methods for a multi-stage signal-processing circuit. The signal-processing circuit can include multiple configurable stages that can be cascaded and configured to process an input signal. Control circuitry can be used to select an output of the configurable stages. Serial data can be recovered with good signal integrity using a signal monitor with the configurable stages by virtually placing the signal monitor on a buffered output node.Type: GrantFiled: July 8, 2016Date of Patent: March 31, 2020Assignee: Analog Devices, IncInventors: Ralph D. Moore, Jesse Bankman
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Patent number: 10541698Abstract: Multiplying digital-to-analog converter (MDACs) are implemented in pipelined ADCs to generate an analog output being fed to a subsequent stage. A switched capacitor MDAC can be implemented by integrating a capacitor digital-to-analog converter (DAC) with charge pump gain circuitry. The capacitor DAC can implement the DAC functionality while the charge pump gain circuitry can implement subtraction and amplification. The resulting switched capacitor MDAC can leverage strengths of nanometer process technologies, i.e., very good switches and highly linear capacitors, to achieve practical pipelined ADCs. Moreover, the switched capacitor MDAC has many benefits over other approaches for implementing the MDAC.Type: GrantFiled: November 8, 2018Date of Patent: January 21, 2020Assignee: Analog Devices, Inc.Inventor: Ralph D. Moore
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Patent number: 10454483Abstract: A time-to-digital converter (TDC) detects a timing relationship between signals representing two temporal events. Several samples are acquired over a certain time period for each event, and the signals related to the different events are digitized or quantized either by separate TDCs or by a single TDC in a time-sequential manner. The quantized results are then processed, for example added to/subtracted from one another, and used to determine the phase or time difference between the two events. When information being quantized is quasi-static over time periods where the measurement is performed, the instantaneous or “one shot” accuracy of a TDC need not be as good as or better than the desired time resolution. Digitally processing the signals and averaging the results moves an otherwise difficult analog quantizer problem to the digital domain where savings in power and chip area can be easily achieved without sacrificing accuracy.Type: GrantFiled: October 24, 2016Date of Patent: October 22, 2019Assignee: ANALOG DEVICES, INC.Inventors: Ralph D. Moore, Ryan Lee Bunch, Carroll C. Speir
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Patent number: 10062450Abstract: In pipelined analog-to-digital converters (ADCs), a passive switched capacitor (PSWC) circuit can be used in a multiplying analog-to-digital converter (MDAC), which generates an analog output being fed to a subsequent stage. Complementary analog input signals are sampled respectively onto first and second capacitors, which are stacked to provide gain. The first capacitor is positioned between a first input switch and an output node of the PSWC circuit, and the second capacitor is positioned between the second input switch and a digital-to-analog converter (DAC) output. The topology advantageously isolates common modes of the complementary analog input signals, the DAC output, and the output of the PSWC circuit. As a result, the topology offers more degrees of freedom in the overall circuit design when stages having the MDAC are cascaded, resulting in pipelined ADCs with a more elegant design with lower noise and lower power consumption.Type: GrantFiled: June 21, 2017Date of Patent: August 28, 2018Assignee: ANALOG DEVICES, INC.Inventors: Ralph D. Moore, Scott G. Bardsley
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Publication number: 20180115406Abstract: A time-to-digital converter (TDC) detects a timing relationship between signals representing two temporal events. Several samples are acquired over a certain time period for each event, and the signals related to the different events are digitized or quantized either by separate TDCs or by a single TDC in a time-sequential manner. The quantized results are then processed, for example added to/ subtracted from one another, and used to determine the phase or time difference between the two events. When information being quantized is quasi-static over time periods where the measurement is performed, the instantaneous or “one shot” accuracy of a TDC need not be as good as or better than the desired time resolution. Digitally processing the signals and averaging the results moves an otherwise difficult analog quantizer problem to the digital domain where savings in power and chip area can be easily achieved without sacrificing accuracy.Type: ApplicationFiled: October 24, 2016Publication date: April 26, 2018Applicant: ANALOG DEVICES, INC.Inventors: RALPH D. MOORE, RYAN LEE BUNCH, CARROLL C. SPEIR
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Publication number: 20170187339Abstract: Provided herein are apparatus and methods for a multi-stage signal-processing circuit. The signal-processing circuit can include multiple configurable stages that can be cascaded and configured to process an input signal. Control circuitry can be used to select an output of the configurable stages. Serial data can be recovered with good signal integrity using a signal monitor with the configurable stages by virtually placing the signal monitor on a buffered output node.Type: ApplicationFiled: July 8, 2016Publication date: June 29, 2017Inventors: Ralph D. Moore, Jesse Bankman
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Patent number: 9577616Abstract: An exemplary level shifter includes a clock level shifter configured to generate a level shifted clock signal from an input clock signal; and a switched capacitor logic controller coupled to the clock level shifter. The switched capacitor logic controller is configured to steer the level shifted clock signal based on a data signal and the input clock signal, providing a level shifted version of the data signal.Type: GrantFiled: January 19, 2015Date of Patent: February 21, 2017Assignee: ANALOG DEVICES, INC.Inventors: Ralph D. Moore, Bryan S. Puckett, Brad P. Jeffries
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Publication number: 20160211832Abstract: An exemplary level shifter includes a clock level shifter configured to generate a level shifted clock signal from an input clock signal; and a switched capacitor logic controller coupled to the clock level shifter. The switched capacitor logic controller is configured to steer the level shifted clock signal based on a data signal and the input clock signal, providing a level shifted version of the data signal.Type: ApplicationFiled: January 19, 2015Publication date: July 21, 2016Applicant: ANALOG DEVICES, INC.Inventors: Ralph D. Moore, Bryan S. Puckett, Brad P. Jeffries