Abstract: A photodetector circuit provides a highly accurate digital signal output in response to incoming optical pulses from an LED having an inherent optical output fall time. The LED is optically coupled to a photodiode which produces an input current in response to the optical output. The input current is amplified by an amplifier having two stages to produce an output voltage signal for switching an output transistor. An RC circuit is coupled between the first and second stage amplifiers for introducing a transient into the output voltage signal for reducing propagation delay and increasing the noise margin of the circuit.

Abstract: The present invention provides an optical isolation amplifier which generates a low-noise analog output signal linearly related to an analog input signal and which conveniently fits within a conventional 8-pin dual in-line package. The optical isolation amplifier package includes an input chip having a sigma-delta analog-to-digital (A/D) converter for converting an analog input signal to a digital signal. The sigma-delta converter is used to modulate an off-chip LED which optically transmits the signal to a photodetector on a separate output chip having an accurate optical recovery section for reproducing the transmitted signal. Also contained on the output chip is a digital-to-analog (D/A) converter for converting the digital signal to an analog output signal linearly related to the analog input signal.

Abstract: An optical transmitter/receiver pair has an integrated CMOS circuit that provides a current flow to a pre-biased solid state light emitting device (LED) in response to the presence or absence of a digital input signal. The current flow is augmented at the rising and falling edges of the input signal to enhance turn-on and turn-off speed of the LED. The LED is optically coupled to a photodiode that produces a current flow in response to illumination. The photodiode is shielded from spurious electronic noise by a transparent shield and the output of the photodiode is amplified to produce an output voltage, which is connected to a capacitively delayed voltage divider. The voltage divider generates a time delayed threshold voltage connectable along with the output voltage to the inputs of a comparator.

Abstract: A bistable switching circuit contains a pair of like-polarity input transistor circuits (Q1 and Q2) arranged in a differential configuration to receive a corresponding pair of input signals. A pair of like-polarity cross-coupled transistor load circuits (Q3 and Q4) complementary to the input transistor circuits are coupled to them. A pair of resistive elements (R1 and R2) are coupled between a voltage supply (V.sub.CC) and the load transistor circuits. An output transistor (Q5) complementary to the input transistor circuit has its control electrode and one of its flow electrodes coupled across one (Q4) of the load transistor circuits. When the input signals assume values capable of causing the output transistor to turn on, no current flows in the output transistor until regeneration occurs in the load transistor circuits -- i.e., until they switch states.