Abstract: Initialization data is received by a memory multiplexer (MEMMUX) and stored in a plurality of registers of the MEMMUX without reading data from memory. The storage of the initialization data in the MEMMUX registers may be sequential or simultaneous. The initialization data is then written to memory along with error detection and correction data as desired.

Abstract: A burst error scrubbing system and method consecutively detects and corrects errors in all of memory, beginning with data stored at the first address of memory and continuing until data stored at the last address of memory is read, corrected and written back to memory. Burst error scrubbing is not performed during a refresh cycle but instead is programmable so that the burst scrubbing can be performed at a specific time interval.

Abstract: A circuit comprising first, second and third latches selectively extends a cycle of a clock signal of a memory system in response to a control signal. A second clock signal having a frequency which is a predetermined multiple of the clock signal of the memory system is coupled to an input of the second and third latches. The first latch receives first and second control signals indicating the detection of parity errors in the memory system and suspends or delays the normal transition of the third latch which provides the memory system clock signal, thereby extending a cycle of the clock signal. The second latch resets the first latch which thereafter resets the third latch causing the clock signal to return to normal cycle operation.