Abstract: A voltage regulation (VR) module of an Information Handling System (IHS) operates a switching direct current to direct current (DC-DC) voltage regulation (VR) power circuit in a constant current mode at a constant current level. The VR module approximates the capacitance value of the output capacitive load at the output terminal of the switching DC-DC VR power circuit based upon a time interval for output voltage to reach a threshold. The VR module then operates the switching DC-DC power circuit in constant output voltage mode using one group of VR operating settings to optimize performance for the capacitance value of the output capacitive load.

Abstract: In accordance with embodiments of the present disclosure, a method may include communicating a first message to an information handling system such that receipt of the first message by the information handling system causes the information handling system to cause a power supply unit integral to the information handling system to experience a perturbation in an electrical current associated with the power supply unit and receiving a second message from a power distribution unit via an outlet integral to the power distribution unit, the second message indicative of a response to the perturbation of a measured electrical parameter of the outlet.

Abstract: Methods and systems are disclosed that may be employed to implement adaptive FET drive voltage optimization for voltage regulator (VR) integrated power stages (IPstages) that have different MOSFET RDS(on) characteristics to improve VR efficiency and current-sense accuracy.

Abstract: A voltage regulator for delivering power to a processor subsystem within an information handling system is disclosed. The voltage regulator includes an interface to an embedded controller for receiving a linear load line impedance and an intelligent load line controller. The intelligent load line controller may enable linear load line control, determine that a nonlinear load line condition is satisfied, and enable nonlinear load line control based on the determination that the nonlinear load line condition is satisfied.

Abstract: A voltage regulator calibrator analyzes voltage regulator output and compares the output with known electrical loads. The calibrator selects a known electrical load, applies the known electrical load to a voltage regulator, receives from the voltage regulator measured output power characteristics of the voltage regulator, compares the known electrical load with the measured output power characteristics, and generates a voltage regulator adjustment value based on the compared values. Embodiments of the present disclosure also include a method for calibrating, the method including selecting a known electrical load, applying the known electrical load to a voltage regulator, receiving measured output power characteristics of the voltage regulator, comparing the known electrical load with the measured output power characteristics, and generating a voltage regulator adjustment value based on the compared values.

Abstract: A voltage regulator may be tuned to reduce consumption of electrical power. An installed configuration of a dual inline memory module is used to load test the voltage regulator. Results of the load test may then reveal tuning parameters that make the voltage regulator more efficient.

Abstract: A method of modulating a laser device having an integrated modulator can include: emitting laser light from a primary laser cavity having quantum wells; passing the laser light through a modulator cavity having at least one modulator quantum well that is coupled with the primary laser cavity and integrated with the laser device; and biasing the modulator cavity so as to deconfine electron and/or hole wavefunctions in the at least one modulator quantum well of the modulator cavity such that the refractive index and absorption of the modulator cavity changes to modulate the laser light passing through the modulator. The method can include at least partially containing the deconfined electron and/or hole wavefunctions in a secondary modulator well region adjacent to a primary modulator well region, the primary modulator well region containing the at least one modulator quantum well.

Abstract: A semiconductor structure configured for use in a VCSEL or RCLED. The semiconductor structure includes an oxidizing layer constructed from materials that can be oxidized during a lithographic process so as to create an oxide aperture. The semiconductor structure further includes a number of layers near the oxidizing layer. A passivation material is disposed on the layers near the oxidizing layer. The passivation material is configured to inhibit oxidation of the layers.

Abstract: A voltage regulator may be tuned to reduce consumption of electrical power. An installed configuration of a dual inline memory module is used to load test the voltage regulator. Results of the load test may then reveal tuning parameters that make the voltage regulator more efficient.

Abstract: In accordance with embodiments of the present disclosure, a method may include communicating a first message to an information handling system such that receipt of the first message by the information handling system causes the information handling system to cause a power supply unit integral to the information handling system to experience a perturbation in an electrical current associated with the power supply unit and receiving a second message from a power distribution unit via an outlet integral to the power distribution unit, the second message indicative of a response to the perturbation of a measured electrical parameter of the outlet.

Abstract: A system and method of measuring real-time current is disclosed. The method includes calibrating a voltage measurement device. Calibrating includes measuring a real-time voltage difference between a first measurement node located proximate a first connector on a motherboard and a second measurement node located proximate a second connector on a power supply unit (PSU), the first and the second connectors coupled to provide power to the motherboard. Calibrating further includes averaging the real-time voltage difference for a plurality of measurements; computing a resistance of the coupling based at least on a long-duration averaged current from the PSU and the averaged real-time voltage difference, the resistance varying over time; and reporting the resistance of the coupling to the voltage measurement device. The method also includes measuring a real-time current of the PSU at the voltage measurement device based at least on the resistance of the coupling and the real-time voltage difference.

Abstract: A VCSEL can include a graphene intra-cavity absorber having at least one graphene region and at least one dielectric region adjacent to the graphene region. The VCSEL can also include a graphene electrode electronically coupled with at least one graphene region. The VCSEL can also include a contact region adjacent with at least one dielectric region. The VCSEL can also include a contact electrode electronically coupled with the contact region. The VCSEL can also include a base electrode electronically coupled with a base of a semiconductor region of the VCSEL. The graphene intra-cavity absorber can include at least two graphene regions sandwiching at least one dielectric region therebetween.

Abstract: A voltage regulator calibrator analyzes voltage regulator output and compares the output with known electrical loads. The calibrator selects a known electrical load, applies the known electrical load to a voltage regulator, receives from the voltage regulator measured output power characteristics of the voltage regulator, compares the known electrical load with the measured output power characteristics, and generates a voltage regulator adjustment value based on the compared values. Embodiments of the present disclosure also include a method for calibrating, the method including selecting a known electrical load, applying the known electrical load to a voltage regulator, receiving measured output power characteristics of the voltage regulator, comparing the known electrical load with the measured output power characteristics, and generating a voltage regulator adjustment value based on the compared values.

Abstract: Methods and systems are disclosed that may be employed to implement adaptive FET drive voltage optimization for voltage regulator (VR) integrated power stages (IPstages) that have different MOSFET RDS(on) characteristics to improve VR efficiency and current-sense accuracy.

Abstract: A computer-implemented method enables determining an input power load for a multi voltage rail subsystem in an electronic device such as an information handing system. The method comprises determining a first output power value from a first voltage regulator and a second output power value from a second voltage regulator. A first input power value to the first voltage regulator is determined based at least partially on the first output power value and a second input power value to the second voltage regulator is determined based at least partially on the second output power value. An offset power value is calculated based on the first input power value and the second input power value. A total input power value is calculated based on the offset power value and a third input power value. The total input power value is transmitted to a processor.

Abstract: A system and method of measuring real-time current is disclosed. The method includes calibrating a voltage measurement device. Calibrating includes measuring a real-time voltage difference between a first measurement node located proximate a first connector on a motherboard and a second measurement node located proximate a second connector on a power supply unit (PSU), the first and the second connectors coupled to provide power to the motherboard. Calibrating further includes averaging the real-time voltage difference for a plurality of measurements; computing a resistance of the coupling based at least on a long-duration averaged current from the PSU and the averaged real-time voltage difference, the resistance varying over time; and reporting the resistance of the coupling to the voltage measurement device. The method also includes measuring a real-time current of the PSU at the voltage measurement device based at least on the resistance of the coupling and the real-time voltage difference.

Abstract: A VCSEL with undoped top mirror. The VCSEL is formed from an epitaxial structure deposited on a substrate, and a periodically doped conduction layer is coupled to the undoped top minor. A periodically doped spacer layer is coupled to an active region. An undoped bottom minor coupled to the periodically doped spacer layer. A first intracavity contact is coupled to the periodically doped conduction layer and a second intracavity contact is coupled to the periodically doped spacer layer.

Abstract: A system and method of measuring real-time current is disclosed. The method includes calibrating a voltage measurement device. Calibrating includes measuring a real-time voltage difference between a first measurement node located proximate a first connector on a motherboard and a second measurement node located proximate a second connector on a power supply unit (PSU), the first and the second connectors coupled to provide power to the motherboard. Calibrating further includes averaging the real-time voltage difference for a plurality of measurements; computing a resistance of the coupling based at least on a long-duration averaged current from the PSU and the averaged real-time voltage difference, the resistance varying over time; and reporting the resistance of the coupling to the voltage measurement device. The method also includes measuring a real-time current of the PSU at the voltage measurement device based at least on the resistance of the coupling and the real-time voltage difference.

Abstract: A VCSEL can include a graphene intra-cavity absorber having at least one graphene region and at least one dielectric region adjacent to the graphene region. The VCSEL can also include a graphene electrode electronically coupled with at least one graphene region. The VCSEL can also include a contact region adjacent with at least one dielectric region. The VCSEL can also include a contact electrode electronically coupled with the contact region. The VCSEL can also include a base electrode electronically coupled with a base of a semiconductor region of the VCSEL. The graphene intra-cavity absorber can include at least two graphene regions sandwiching at least one dielectric region therebetween.

Abstract: A laser active region can include a quantum well barrier having GaPSb. The active region can include one or more quantum wells, and a quantum well barrier having GaPSb bounding each side of each of the one or more quantum wells. The quantum well barrier can be GaP1-wSbw, where w ranges from about 0.12 to about 0.25 mole fraction, and can have a thickness of from about 20 Angstroms to about 50 Angstroms. The one or more quantum wells include InGaAs or InGaAsP. Various types of lasers can have the laser active region. Such a laser can be capable of emitting light having a wavelength of about 850 nm or +/?150 nm. As an example, a vertical cavity surface-emitting laser (VCSEL) having the laser active region. The laser may also be a tunneling laser.