Patents by Inventor Ralph Mueller-Eschenbach

Ralph Mueller-Eschenbach has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942959
    Abstract: A calibration circuit, including: a signal generator circuit configured to generate a modulated analog input signal, which is based on a digital input word that is modulated; an Analog-to-Digital Converter (ADC) configured to convert an analog reference signal to a digital calibration word, wherein the analog reference signal is a low-pass-filtered version of the analog input signal generated by the signal generator circuit; and a feedback circuit configured to output the digital input word by adjusting the digital calibration word depending on a digital feedback signal, which is based on a modulated version of the analog reference signal, wherein the signal generator circuit, the ADC, and the feedback circuit are provided on a same chip.
    Type: Grant
    Filed: September 28, 2021
    Date of Patent: March 26, 2024
    Assignee: Infineon Technologies AG
    Inventors: Mihail Jefremow, Stefan Koeck, Ralph Mueller-Eschenbach, Juergen Schaefer, Arndt Voigtlaender, David Zipperstein
  • Patent number: 11831306
    Abstract: According to an example, an electronic device includes a component, a supply line providing a supply voltage, a transistor with a control input, a linear first control loop, and a non-linear second control loop. The transistor outputs an output voltage to the component depending on a signal applied to the control input. The linear first control loop includes an ADC to convert an analog output voltage level into a digital measurement signal, a controller to generate a digital control signal for the transistor depending on the digital measurement signal, and a DAC to convert the digital control signal into a first analog control signal. The non-linear second control loop is configured to generate a second analog control signal depending on the analog output voltage level. The second analog control signal is superimposed with the first analog control signal and the combined control signals are fed to the control input of the transistor.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: November 28, 2023
    Assignee: Infineon Technologies AG
    Inventors: Mihail Jefremow, David Zipperstein, Juergen Schaefer, Holger Dienst, Markus Bichl, Ralph Mueller-Eschenbach, Arndt Voigtlaender
  • Patent number: 11705917
    Abstract: A device is provided for time measurement of a clock-based signal comprising a sample stage comprising a switching device that is driven by a control signal and a capacitance (Cs), wherein the sample stage is arranged to transform an analog input signal in an analog output signal, the device further comprising an analog-to-digital converter to convert the analog output signal into a digital output signal, wherein the input signal applied to the sample stage is a reference signal and wherein the clock-based signal is applied to the control signal. Also, an according method is suggested.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: July 18, 2023
    Assignee: Infineon Technologies AG
    Inventors: Mihail Jefremow, Ketan Dewan, Rex Kho, Ralph Mueller-Eschenbach, Juergen Schaefer
  • Publication number: 20230106703
    Abstract: A calibration circuit, including: a signal generator circuit configured to generate a modulated analog input signal, which is based on a digital input word that is modulated; an Analog-to-Digital Converter (ADC) configured to convert an analog reference signal to a digital calibration word, wherein the analog reference signal is a low-pass-filtered version of the analog input signal generated by the signal generator circuit; and a feedback circuit configured to output the digital input word by adjusting the digital calibration word depending on a digital feedback signal, which is based on a modulated version of the analog reference signal, wherein the signal generator circuit, the ADC, and the feedback circuit are provided on a same chip.
    Type: Application
    Filed: September 28, 2021
    Publication date: April 6, 2023
    Inventors: Mihail Jefremow, Stefan Koeck, Ralph Mueller-Eschenbach, Juergen Schaefer, Arndt Voigtlaender, David Zipperstein
  • Patent number: 11621717
    Abstract: A calibration circuit, including: a first analog-to-digital converter (ADC) configured to sample a nonlinear reference signal continuously at an equidistant sampling rate to generate a reference sampled signal; a trigger timer configured to generate trigger signals; a second ADC configured to sample a point of each of the nonlinear reference signal and repeated versions of the nonlinear reference signal in response to the respective trigger signals at equidistantly increasing delays, to generate a device-under-test (DUT) sampled voltage; and processing circuitry configured to estimate a differential nonlinearity (DNL) of the DUT sampled signal, estimate a DNL of the reference sampled signal, and compare the estimated DNL of the DUT sampled signal with the estimated DNL of the reference sampled signal, to generate a DNL performance indication signal of the second ADC.
    Type: Grant
    Filed: November 5, 2021
    Date of Patent: April 4, 2023
    Assignee: Infineon Technologies AG
    Inventors: Mihail Jefremow, Ralph Mueller-Eschenbach, Juergen Schaefer, Arndt Voigtlaender, David Zipperstein
  • Publication number: 20220399886
    Abstract: According to an example, an electronic device includes a component, a supply line providing a supply voltage, a transistor with a control input, a linear first control loop, and a non-linear second control loop. The transistor outputs an output voltage to the component depending on a signal applied to the control input. The linear first control loop includes an ADC to convert an analog output voltage level into a digital measurement signal, a controller to generate a digital control signal for the transistor depending on the digital measurement signal, and a DAC to convert the digital control signal into a first analog control signal. The non-linear second control loop is configured to generate a second analog control signal depending on the analog output voltage level. The second analog control signal is superimposed with the first analog control signal and the combined control signals are fed to the control input of the transistor.
    Type: Application
    Filed: June 9, 2022
    Publication date: December 15, 2022
    Inventors: Mihail Jefremow, David Zipperstein, Juergen Schaefer, Holger Dienst, Markus Bichl, Ralph Mueller-Eschenbach, Arndt Voigtlaender
  • Patent number: 11329608
    Abstract: Systems, methods, and circuits are provided for facilitating negative resistance margin testing in an oscillator circuit. An example oscillator circuit includes amplifier circuitry configured to be coupled in parallel with a resonator and variable resistance circuitry configured to, in response to a resistance control signal, adjust a resistance of the oscillator circuit.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: May 10, 2022
    Assignee: Infineon Technologies AG
    Inventors: Mihail Jefremow, Rex Kho, Ralph Mueller-Eschenbach, Juergen Schaefer, Arndt Voigtlaender, Wei Wang
  • Publication number: 20220131499
    Abstract: Systems, methods, and circuits are provided for facilitating negative resistance margin testing in an oscillator circuit. An example oscillator circuit includes amplifier circuitry configured to be coupled in parallel with a resonator and variable resistance circuitry configured to, in response to a resistance control signal, adjust a resistance of the oscillator circuit.
    Type: Application
    Filed: October 23, 2020
    Publication date: April 28, 2022
    Inventors: Mihail Jefremow, Rex Kho, Ralph Mueller-Eschenbach, Juergen Schaefer, Arndt Voigtlaender, Wei Wang
  • Publication number: 20220085824
    Abstract: A device is provided for time measurement of a clock-based signal comprising a sample stage comprising a switching device that is driven by a control signal and a capacitance (Cs), wherein the sample stage is arranged to transform an analog input signal in an analog output signal, the device further comprising an analog-to-digital converter to convert the analog output signal into a digital output signal, wherein the input signal applied to the sample stage is a reference signal and wherein the clock-based signal is applied to the control signal. Also, an according method is suggested.
    Type: Application
    Filed: September 7, 2021
    Publication date: March 17, 2022
    Inventors: Mihail Jefremow, Ketan Dewan, Rex Kho, Ralph Mueller-Eschenbach, Juergen Schaefer
  • Patent number: 11177987
    Abstract: Processing a resolver signal by a microcontroller includes generating, by a carrier signal generator, a carrier signal for output to a resolver; receiving modulated carrier signals from a resolver via hardware that is external to the microcontroller; integrating, by an integrator, respective integrator input signals which are based on the modulated carrier signals, to generate respective envelope signals, wherein a start of an integration window of the integrator is set with respect to a start of the carrier signal; and determining an angular position sensed by the resolver based on the envelope signals.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: November 16, 2021
    Assignee: Infineon Technologies AG
    Inventors: Mihail Jefremow, Michael Augustin, Ketan Dewan, Ralph Mueller-Eschenbach, Juergen Schaefer