Abstract: A voltage-controlled oscillator circuit connected to supply and reference voltage for radio frequency operation is disclosed. The circuit comprises at least one inductor and at least one varactor connected in parallel with the at least one inductor. The circuit also comprises a pair of p-channel MOS transistors connected across the at least one varactor, each p-channel MOS transistor having source, drain, and gate terminals, wherein the drain terminal of the first of the pair of p-channel MOS transistors is connected to the gate terminal of the second of the pair of p-channel MOS transistors and the drain terminal of second of the pair of MOS transistors being connected to the gate terminal of the first of the pair of MOS transistors.

Abstract: A fractional-N frequency synthesizer has a modulus controller with multiple inputs that control an initial output frequency of the frequency synthesizer, an increment of variation of tuning of the frequency synthesizer, and a difference between two adjacent output frequency settings. The fractional frequency synthesizer includes a modulus controller, which controls the modulus factor for a multiple modulus frequency divider. The modulus controller has a modulus selection circuit that provides a modulus control signal to the modulus divider to select the modulus factor of the modulus divider as a function of a sum of one input factor and a product of a second input and the gain factor. Control signal is an overflow from a continuous summation of the second digital data word and a product of the first digital data word and the gain factor digital data word repetitively with itself.

Abstract: A fractional-N frequency synthesizer has a modulus controller with multiple inputs that control an initial output frequency of the frequency synthesizer, an increment of variation of tuning of the frequency synthesizer, and a difference between two adjacent output frequency settings. The fractional frequency synthesizer includes a modulus controller, which controls the modulus factor for a multiple modulus frequency divider. The modulus controller has a modulus selection circuit that provides a modulus control signal to the modulus divider to select the modulus factor of the modulus divider as a function of a sum of one input factor and a product of a second input and the gain factor. Control signal is an overflow from a continuous summation of the second digital data word and a product of the first digital data word and the gain factor digital data word repetitively with itself.

Abstract: The present invention provides a circuit and a method for high speed prescaler circuits which utilize pull-down transistors in the critical feedback path. This invention contains a high speed CMOS dual modulus prescaler circuit made up of data or D-flip flops connected serially where the flip-flop positive output Q of stage N is connected to the D-input of the N+1 flip-flop stage. It is also made up of a pull-down field effect transistor. The invention has a clock input which has a frequency known as a circuit input frequency, Fin. The output of this prescaler circuit has an output frequency, Fout. The frequency division which results from this prescaler circuit is a divide by [2 to the power (n+2)] minus 1 if a mode signal equals 1 as opposed to a divide by [2 to the power (n+2)] counter, which results when the mode signal is low.