Abstract: Aspects of the disclosure are directed to a package including a substrate, die coupled to the substrate, wick deposited on the die, and an evaporation-condensation chamber having a hollowed bottom and two bottom lips, wherein the wick mates into the hollowed enclosure and substantially merges with the two bottom lips forming a sealed chamber. Other aspects are directed to a method of forming a package including coupling a die to a substrate, depositing a wick on the die, and mating the wick with an evaporation-condensation chamber having a hollowed enclosure and two bottom lips, wherein the mating attaches the wick into the hollowed enclosure and substantially merges the wick with the two bottom lips forming a sealed chamber. By directly depositing the wick over the die and integrating the wick with the encapsulation-condensation chamber, this integrated solution provides significant improvement in package thermal resistance especially for high-power and high-performance applications.

Abstract: An apparatus is disclosed that comprises an integrated circuit and a thermal detector array configured to detect thermal radiation from the integrated circuit. A method is disclosed that comprises providing an integrated circuit and disposing a thermal detector array so as to detect thermal radiation from the integrated circuit. Another apparatus is disclosed that comprises means for processing and means for detecting thermal radiation from the means for processing.

Abstract: A transparent coversheet intervenes between a lens and a thinned die in a visible light fault analysis tool so that the thinned die is robust to fractures. In addition, the transparent coversheet has a greater thermal mass than the thinned die and thus acts as a heat sink to prevent active circuitry in the thinned die from overheating during the visible light fault analysis.

Abstract: An apparatus is disclosed that comprises an integrated circuit and a thermal detector array configured to detect thermal radiation from the integrated circuit. A method is disclosed that comprises providing an integrated circuit and disposing a thermal detector array so as to detect thermal radiation from the integrated circuit. Another apparatus is disclosed that comprises means for processing and means for detecting thermal radiation from the means for processing.

Abstract: A transparent coversheet intervenes between a lens and a thinned die in a visible light fault analysis tool so that the thinned die is robust to fractures. In addition, the transparent coversheet has a greater thermal mass than the thinned die and thus acts as a heat sink to prevent active circuitry in the thinned die from overheating during the visible light fault analysis.

Abstract: Various apparatus and methods of testing a semiconductor chip for soft defects are disclosed. In one aspect, a method of testing a semiconductor chip that has a surface and plural circuit structures positioned beneath the surface is provided. An irradiation mask directs light or heat to a series of fractional portions of the surface to perturb portions of the plural circuit structures. The irradiation mask is adjustable such that at least one of the exposed series of fractional portions is smaller than another of the series of fractional portions. The semiconductor chip undergoes a test pattern during the irradiation to each of the fractional portions to determine if a soft defect exists in any of the series of fractional portions. Multiple paths can be tested simultaneously to inform subsequent individual CTP path tests.

Abstract: Various apparatus and methods of testing a semiconductor chip for soft defects are disclosed. In one aspect, a method of testing a semiconductor chip that has a surface and plural circuit structures positioned beneath the surface is provided. An irradiation mask directs light or heat to a series of fractional portions of the surface to perturb portions of the plural circuit structures. The irradiation mask is adjustable such that at least one of the exposed series of fractional portions is smaller than another of the series of fractional portions. The semiconductor chip undergoes a test pattern during the irradiation to each of the fractional portions to determine if a soft defect exists in any of the series of fractional portions. Multiple paths can be tested simultaneously to inform subsequent individual CTP path tests.