Patents by Inventor Rama Singh

Rama Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11948019
    Abstract: An interruption-handling setting for a category of interactions of an application is determined via a programmatic interface. A set of user-generated input is obtained while presentation to a user of a set of output of the category is in progress. A response to the set of user-generated input is prepared based at least in part on the interruption-handling setting.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: April 2, 2024
    Assignee: Amazon Technologies, Inc.
    Inventors: Swapandeep Singh, Minaxi Singla, Kartik Rustagi, Omkar Prakash Kurode, Gouthamamani Venkatesan, Ajay Bhaskar Medury, Lefan Zhang, Haiyang Sun, Rama Krishna Sandeep Pokkunuri, Sai Madhu Bhargav Pallem, Harshal Pimpalkhute
  • Publication number: 20240079358
    Abstract: Stacked semiconductor devices, and related systems and methods, are disclosed herein. In some embodiments, the stacked semiconductor device includes a package substrate and a die stack carried by the package substrate. The die stack can include at least a first semiconductor die carried by the package substrate, a second semiconductor die carried by the first semiconductor die. The first semiconductor die can have an upper surface and a first bond pad carried by the upper surface that includes a curvilinear concave depression formed in an uppermost surface of the first bond pad. The second semiconductor die has a lower surface and a second bond pad carried by the lower surface. The die stack can also include solder structure electrically coupling the first and second bond pads and at least partially filling the curvilinear concave depression formed in the uppermost surface of the first bond pad.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Inventors: Siva Sai Kishore Palli, Venkata Rama Satya Pradeep Vempaty, Wen How Sim, Chen Yu Huang, Harjashan Veer Singh
  • Publication number: 20080071512
    Abstract: A method for predicting functionality of an integrated circuit segment to be lithographically printed on a wafer. Initially there is provided a two-dimensional design of an integrated circuit, including an integrated circuit segment having critical width, and a two-dimensional printed image of the critical width integrated circuit segment is simulated. The method then includes determining a ratio of perimeters or areas of the designed critical width integrated circuit segment to the simulated printed critical width integrated circuit segment, and predicting functionality of the critical width integrated circuit segment after printing based on the ratio of perimeters or areas.
    Type: Application
    Filed: November 19, 2007
    Publication date: March 20, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ioana Graur, Kafai Lai, Rama Singh
  • Publication number: 20060282246
    Abstract: A method for predicting functionality of an integrated circuit segment to be lithographically printed on a wafer. Initially there is provided a two-dimensional design of an integrated circuit, including an integrated circuit segment having critical width, and a two-dimensional printed image of the critical width integrated circuit segment is simulated. The method then includes determining a ratio of perimeters or areas of the designed critical width integrated circuit segment to the simulated printed critical width integrated circuit segment, and predicting functionality of the critical width integrated circuit segment after printing based on the ratio of perimeters or areas.
    Type: Application
    Filed: May 24, 2005
    Publication date: December 14, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ioana Graur, Kafai Lai, Rama Singh
  • Publication number: 20060036977
    Abstract: A design system for designing complex integrated circuits (ICs), a method of IC design and program product therefor. A layout unit receives a circuit description representing portions in a grid and glyph format. A checking unit checks grid and glyph portions of the design. An elaboration unit generates a target layout from the checked design. A data prep unit prepares the target layout for mask making. A pattern caching unit selectively replaces portions of the design with previously cached results for improved design efficiency.
    Type: Application
    Filed: August 12, 2004
    Publication date: February 16, 2006
    Inventors: John Cohn, James Culp, Ulrich Finkler, Fook-Luen Heng, Mark Lavin, Jin Lee, Lars Liebmann, Gregory Northrop, Nakgeuon Seong, Rama Singh, Leon Stok, Pieter Woltgens
  • Publication number: 20050055658
    Abstract: A method of designing lithographic masks is provided where mask segments used in a model-based optical proximity correction (MBOPC) scheme are adaptively refined based on local image information, such as image intensity, gradient and curvature. The values of intensity, gradient and curvature are evaluated locally at predetermined evaluation points associated with each segment. An estimate of the image intensity between the local evaluation points is preferably obtained by curve fitting based only on values at the evaluation points. The decision to refine a segment is based on the deviation of the simulated image threshold contour from the target image threshold contour. The output mask layout will provide an image having improved fit to the target image, without a significant increase in computation cost.
    Type: Application
    Filed: September 9, 2003
    Publication date: March 10, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Maharaj Mukherjee, Zachary Baum, Mark Lavin, Donald Samuels, Rama Singh
  • Patent number: 5621486
    Abstract: An optical system is described consisting of reflection birefringent light valves, polarizing beam splitter, color image combining prisms, illumination system having a light tunnel, projection lens, filters for color and contrast control, and screen placed in a configuration offering advantages for a high resolution color display.
    Type: Grant
    Filed: June 22, 1995
    Date of Patent: April 15, 1997
    Assignee: International Business Machines Corporation
    Inventors: Fuad Doany, Derek B. Dove, Rama Singh, Alan Rosenbluth, George Chiu, Thomas Cipolla, Janusz Wilczynski
  • Patent number: 4747678
    Abstract: There is disclosed a ring field relay optical system incorporating concave spherical mirrors and including magnification achieved, at least partially, by a convex spherical mirror. In further modifications, aberrations introduced by the convex mirror are controlled by lens groups formed from fused silica. The system is usable from the visible through the deep ultraviolet portion of the spectrum.
    Type: Grant
    Filed: December 17, 1986
    Date of Patent: May 31, 1988
    Assignee: The Perkin-Elmer Corporation
    Inventors: David R. Shafer, Abe Offner, Rama Singh