Abstract: A micro-electro-mechanical system (MEMS) device includes a substrate having a cavity and a MEMS structure disposed over the cavity and attached to the substrate. The MEMS structure includes at least one first piezoelectric layer having a first piezoelectric coefficient and two second piezoelectric layers respectively disposed under and above the first piezoelectric layer, where each second piezoelectric layer has a second piezoelectric coefficient higher than the first piezoelectric coefficient. The MEMS structure further includes a first electrode layer and a second electrode layer sandwiching the two second piezoelectric layers.

Abstract: A microelectromechanical systems (MEMS) package includes a first MEMS package and a second MEMS package laterally spaced apart from the first MEMS package. The first MEMS package includes a first device substrate including a first MEMS device, a first cap substrate bonded to the first device substrate, where the first cap substrate encloses a first cavity and a vent hole connected to the first cavity. A first sealing layer is filled in the vent hole, where the first sealing layer is disposed between the first device substrate and the first cap substrate. The second MEMS package includes a second device substrate including a second MEMS device and a second cap substrate. The second cap substrate is bonded to the second device substrate and encloses a second cavity. The first cavity has a first pressure, and the second cavity have a second pressure different from the first pressure.

Abstract: A micro-electro-mechanical system (MEMS) device includes a first substrate, an interconnect layer, a MEMS device layer, a stopper and a second substrate. The interconnect layer is disposed on the first substrate and includes a plurality of conductive layers and a plurality of dielectric layer stacked alternately. The MEMS device layer is bonded on the interconnect layer and includes a proof mass. The stopper is disposed directly under the proof mass and spaced apart from the proof mass, where the stopper is surrounded by a portion of the interconnect layer, and the stopper includes a bottom portion constructed of one of the plurality of conductive layers, and a silicon-based layer disposed on the bottom portion. The second substrate includes a cavity and is bonded on the MEMS device layer.

Abstract: A micro-electro-mechanical system (MEMS) device includes a supporting substrate, a cavity, a stopper, a MEMS structure, and a bonding dielectric layer. The cavity is located at a top surface of the supporting substrate. The stopper is adjacent to the cavity, where a top surface of the stopper and the top surface of the supporting substrate are on the same level in a height. The MEMS structure is disposed on the supporting substrate, where the MEMS structure includes a proof mass and a suspension beam. The proof mass is disposed directly above the stopper, and the suspension beam is disposed directly above the cavity. The bonding dielectric layer is disposed between the top surface of the supporting substrate and a bottom surface of the MEMS structure.

Abstract: A micro-electro-mechanical system (MEMS) device includes a supporting substrate, a cavity disposed in the supporting substrate, a stopper, and a MEMS structure. The stopper is disposed between the supporting substrate and the cavity, and an inner sidewall of the stopper is in contact with the cavity. The stopper includes a filling material surrounding a periphery of the cavity, and a liner wrapping around the filling material. The MEMS structure is disposed over the cavity and attached on the stopper and the supporting substrate.

Abstract: A method of fabricating a semiconductor substrate includes the following steps. A first wafer is provided and a first surface of the first wafer is etched to form a plurality of cavities. A second wafer is formed on the first surface, where forming the second wafer includes the following steps: providing a core substrate; forming a first insulating layer on the core substrate; and depositing a polysilicon layer on the first insulating layer and the core substrate. In addition, the polysilicon layer is bonded with the first wafer to cover the cavities, where the polysilicon layer is disposed between the first insulating layer and the first wafer. In addition, a semiconductor substrate and MEMS devices using the semiconductor substrate are also provided.

Abstract: Microelectromechanical System (MEMS) devices and related fabrication methods. A piezoelectric stack is formed on a substrate and is separated from the substrate by a dielectric layer. The piezoelectric stack is formed that includes first and second piezoelectric layers with a first electrode below the first piezoelectric layer, as well as a contact pad and a second electrode between the first and second piezoelectric layers. A first contact is formed that extends through the piezoelectric layers and contact pad to the first electrode. A second contact is formed that extends through the second piezoelectric layer to the second electrode. The contact pad prevents an interface to form between the first and second piezoelectric layers in the contact opening, thus preventing corrosion of the piezoelectric layers during contact formation process.

Abstract: Integrated circuits having shielded micro-electromechanical system (MEMS) devices and method for fabricating shielded MEMS devices are provided. In an example, an integrated circuit having a shielded MEMS device includes a substrate, a ground plane including conductive material over the substrate, and a dielectric layer over the ground plane. The integrated circuit further includes a MEMS device over the ground plane. Also, the integrated circuit includes a conductive pillar through the dielectric layer and in contact with the ground plane. The integrated circuit includes a metallic thin film over the MEMS device and in contact with the conductive pillar, wherein the metallic thin film, the conductive pillar and the ground plane form an electromagnetic shielding structure surrounding the MEMS device. Further, the integrated circuit includes an acoustic shielding structure over the substrate and adjacent the electromagnetic shielding structure.

Abstract: Three-axis monolithic microelectromechanical system (MEMS) accelerometers and methods for fabricating integrated capacitive and piezo accelerometers are provided. In an embodiment, a three-axis MEMS accelerometer includes a first sensing structure for sensing acceleration in a first direction. Further, the three-axis MEMS accelerometer includes a second sensing structure for sensing acceleration in a second direction perpendicular to the first direction. Also, the three-axis MEMS accelerometer includes a third sensing structure for sensing acceleration in a third direction perpendicular to the first direction and perpendicular to the second direction. At least one sensing structure is a capacitive structure and at least one sensing structure is a piezo structure.

Abstract: Integrated circuits having shielded micro-electromechanical system (MEMS) devices and method for fabricating shielded MEMS devices are provided. In an example, an integrated circuit having a shielded MEMS device includes a substrate, a ground plane including conductive material over the substrate, and a dielectric layer over the ground plane. The integrated circuit further includes a MEMS device over the ground plane. Also, the integrated circuit includes a conductive pillar through the dielectric layer and in contact with the ground plane. The integrated circuit includes a metallic thin film over the MEMS device and in contact with the conductive pillar, wherein the metallic thin film, the conductive pillar and the ground plane form an electromagnetic shielding structure surrounding the MEMS device. Further, the integrated circuit includes an acoustic shielding structure over the substrate and adjacent the electromagnetic shielding structure.

Abstract: A Microelectromechanical System (MEMS) device which includes a piezoelectric stack on a substrate separated by a dielectric layer is disclosed. The piezoelectric stack includes first and second piezoelectric layers with a first electrode below the first piezoelectric layer and a contact pad and a second electrode between the first and second piezoelectric layers. A first contact extends through the piezoelectric layers and contact pad to the first electrode and a second contact extends through the second piezoelectric layer to the second electrode. The contact pad prevents an interface to form between the first and second piezoelectric layers in the contact opening, thus preventing corrosion of the piezoelectric layers during contact formation process.

Abstract: Three-axis monolithic microelectromechanical system (MEMS) accelerometers and methods for fabricating integrated capacitive and piezo accelerometers are provided. In an embodiment, a three-axis MEMS accelerometer includes a first sensing structure for sensing acceleration in a first direction. Further, the three-axis MEMS accelerometer includes a second sensing structure for sensing acceleration in a second direction perpendicular to the first direction. Also, the three-axis MEMS accelerometer includes a third sensing structure for sensing acceleration in a third direction perpendicular to the first direction and perpendicular to the second direction. At least one sensing structure is a capacitive structure and at least one sensing structure is a piezo structure.

Abstract: A device that includes a substrate with an active region is disclosed. The device includes a gate disposed in the active region and tunable sidewall spacers on sidewalls of the gate. A profile of the tunable sidewall spacers includes upper and lower portions in which width of the spacers in the upper portion is reduced at a greater rate than the lower portion.

Abstract: A device that includes a substrate with an active region is disclosed. The device includes a gate disposed in the active region and tunable sidewall spacers on sidewalls of the gate. A profile of the tunable sidewall spacers includes upper and lower portions in which width of the spacers in the upper portion is reduced at a greater rate than the lower portion.

Abstract: A method of fabricating local interconnects of polycide has been achieved. A substrate is provided. Narrowly spaced features, such as MOS transistor gates and polysilicon traces, are provided overlying the substrate. A dielectric layer is deposited overlying the substrate and the narrowly spaced features. The dielectric layer is patterned to form openings between the narrowly spaced features for planned contacts to the surface of the substrate. A doped polysilicon layer is deposited overlying the dielectric layer and filling the openings. The doped polysilicon layer is etched down to the top surface of the narrowly spaced features. The doped polysilicon layer remains in the spaces between the narrowly spaced features. A polycide layer is formed overlying the narrowly spaced features and the doped polysilicon layer. The polycide layer and the doped polysilicon layer are patterned to complete the contacts and create the local interconnects of polycide, and the integrated circuit device is completed.