Patents by Inventor Raman Venkataramani
Raman Venkataramani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11949435Abstract: A cyclo-stationary characteristic of a communications channel and/or storage media is determined. The cyclo-stationary characteristic has K-cycles, K>1. Markov transition probabilities are determined that depend on a discrete phase ?=t mod K, wherein t is a discrete time value. An encoder to optimize the Markov transition probabilities for encoding data sent through the communications channel and/or stored on the storage media. The optimized Markov transition probabilities are used to decode the data from the communication channel and/or read from the storage media.Type: GrantFiled: September 15, 2021Date of Patent: April 2, 2024Assignee: Seagate Technology LLCInventors: William M. Radich, Raman Venkataramani, Jason Bellorado, Marcus Marrow, Zheng Wang
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Publication number: 20230212666Abstract: Systems and methods are disclosed for performing segmentation and labeling of signals generated by single molecule sequencing. In certain embodiments, a method may comprise receiving a training signal generated by molecular detection, segmenting the training signal into a set of events, determining signal characteristics for the set of events, generating a Hidden Markov Model (HMM) based on the set of events and the signal characteristics. The HMM may also be applied to a second signal and may responsively segment the second signal into a second set of events and label the second set of events based on the signal characteristics. A labeled sequence signal output may be provided that includes the second set of events and corresponding labels generated by the HMM.Type: ApplicationFiled: December 30, 2021Publication date: July 6, 2023Inventors: Raman Venkataramani, William M. Radich, Jason Bellorado
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Publication number: 20230105010Abstract: A cyclo-stationary characteristic of a communications channel and/or storage media is determined. The cyclo-stationary characteristic has K-cycles, K > 1. Markov transition probabilities are determined that depend on a discrete phase ?=t mod K, wherein t is a discrete time value. An encoder to optimize the Markov transition probabilities for encoding data sent through the communications channel and/or stored on the storage media. The optimized Markov transition probabilities are used to decode the data from the communication channel and/or read from the storage media.Type: ApplicationFiled: September 15, 2021Publication date: April 6, 2023Inventors: William M. Radich, Raman Venkataramani, Jason Bellorado, Marcus Marrow, Zheng Wang
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Patent number: 11493499Abstract: Systems and methods are disclosed for performing event timing detection for DNA sequencing. In certain embodiments, a method may comprise generating a signal based on a DNA strand passed through a nanopore sensor, sampling the signal to generate a plurality of sample values, and detecting one or more event boundaries based on the sample values, an event representing a movement of a single DNA base of the DNA strand through the nanopore sensor. Detecting the one or more event boundaries may include segmenting the plurality of sample values into multiple events to calculate an optimal total score, assigning an event value to a selected event from the multiple events based on sample values of the selected event, and providing the event value to a base caller to determine a sequence of DNA bases.Type: GrantFiled: October 30, 2018Date of Patent: November 8, 2022Assignee: Seagate Technology LLCInventors: Raman Venkataramani, William Radich
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Publication number: 20210035656Abstract: A system comprises a joint event segmentation and basecalling module to accept raw current signals read from a DNA strand, wherein the raw current signals span one or more events each representing a single base movement in an underlying DNA base sequence. The joint event segmentation and basecalling module combines a run-length tracking hidden Markov model (HMM) for event detection and a de Bruijn HMM for basecalling in a single joint HMM, wherein the run-length HMM tracks duration of a current event in the DNA base sequence and the de Bruijn HMM tracks a local k-mer of the current event in the DNA base sequence. The joint event segmentation and basecalling module then utilizes the single joint HMM to process the raw current signals to track both the local k-mer and the duration of the current event in the DNA base sequence simultaneously via dynamic programming.Type: ApplicationFiled: July 30, 2019Publication date: February 4, 2021Inventors: Raman VENKATARAMANI, William M. RADICH
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Patent number: 10447315Abstract: In one embodiment, a system provides for optimizing an error rate of data through a communication channel. The system includes a data generator operable to generate a training sequence as a Markov code, and to propagate the training sequence through the communication channel. The system also includes a Soft Output Viterbi Algorithm (SOVA) detector operable to estimate data values of the training sequence after propagation through the communication channel. The system also includes an optimizer operable to compare the estimated data values to the generated training sequence, to determine an error rate based on the comparison, and to change the training sequence based on the Markov code to lower the error rate of the data through the communication channel.Type: GrantFiled: August 15, 2017Date of Patent: October 15, 2019Assignee: Seagate Technologies LLCInventor: Raman Venkataramani
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Publication number: 20190058494Abstract: In one embodiment, a system provides for optimizing an error rate of data through a communication channel. The system includes a data generator operable to generate a training sequence as a Markov code, and to propagate the training sequence through the communication channel. The system also includes a Soft Output Viterbi Algorithm (SOVA) detector operable to estimate data values of the training sequence after propagation through the communication channel. The system also includes an optimizer operable to compare the estimated data values to the generated training sequence, to determine an error rate based on the comparison, and to change the training sequence based on the Markov code to lower the error rate of the data through the communication channel.Type: ApplicationFiled: August 15, 2017Publication date: February 21, 2019Inventor: Raman Venkataramani
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Patent number: 10148470Abstract: A method includes receiving a data signal over a multi-input multi-output (MIMO) channel. The method further includes equalizing the data signal, by an adaptive equalizer circuit having an associated target, to provide an equalized output of the data signal. As part of the method, taps of the equalizer circuit and coefficients of the target are estimated. A constraint is imposed on the coefficients of the target as part of the estimation of the coefficients of the target. A similar minimization process is used with constraint imposed on whitening filter taps associated with a DDNP detector in the MIMO channel.Type: GrantFiled: August 11, 2017Date of Patent: December 4, 2018Assignee: SEAGATE TECHNOLOGY LLCInventors: Belkacem Derras, Raman Venkataramani, William M. Radich
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Patent number: 9973354Abstract: In certain embodiments, an apparatus may comprise a circuit configured to receive a plurality of samples of an input signal. The circuit may update one or more equalizer parameters using partial zero forcing equalization. Further, the circuit may generate an equalized signal based on the plurality of samples of the input signal and the one or more equalizer parameters.Type: GrantFiled: June 25, 2016Date of Patent: May 15, 2018Assignee: Seagate Technology LLCInventors: William Michael Radich, Raman Venkataramani, Belkacem Derras, Rishi Ahuja
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Patent number: 9947362Abstract: A system may include an interpolator circuit configured to receive a first signal with a first rate and to generate an interpolated signal with a second rate. The system may include a cancellation circuit configured to determine an interference component signal based on the interpolated signal. The system may further comprise an adder configured to receive a second signal with the second rate and to cancel interference in the second signal using the interference component signal to generate a cleaned signal.Type: GrantFiled: June 25, 2016Date of Patent: April 17, 2018Assignee: Seagate Technology LLCInventors: Raman Venkataramani, Belkacem Derras, William Michael Radich
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Patent number: 9830942Abstract: First and second different write precompensation values are associated with different first and second non-return-to-zero, inverted (NRZI) data patterns. The first and second different write precompensation values cause a predetermined phase shift to be written into test data that comprises the first and second NRZI data patterns. The test data is mitten to a recording medium of a storage device using the first and second write precompensation value. The test data is used to determine a response of the storage device to the predetermined phase shift.Type: GrantFiled: August 10, 2016Date of Patent: November 28, 2017Assignee: SEAGATE TECHNOLOGY LLCInventors: Drew Michael Mader, Jason Charles Jury, Tim Rausch, Raman Venkataramani
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Patent number: 9590803Abstract: A digitized signal is processed via an interpolator. The interpolator performs timing adjustment on the digitized signal. The error signal is determined based on a desired signal and the time-adjusted digitized signal. A corrective phase shift of the digitized signal is determined via a least-mean-squared processing block that uses the error and the derivative of a function used by the interpolator. The corrective phase shift is input to the interpolator to perform the timing adjustment.Type: GrantFiled: May 22, 2015Date of Patent: March 7, 2017Assignee: SEAGATE TECHNOLOGY LLCInventors: Belkacem Derras, Raman Venkataramani, William Michael Radich
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Publication number: 20160344540Abstract: A digitized signal is processed via an interpolator. The interpolator performs timing adjustment on the digitized signal. The error signal is determined based on a desired signal and the time-adjusted digitized signal. A corrective phase shift of the digitized signal is determined via a least-mean-squared processing block that uses the error and the derivative of a function used by the interpolator. The corrective phase shift is input to the interpolator to perform the timing adjustment.Type: ApplicationFiled: May 22, 2015Publication date: November 24, 2016Inventors: Belkacem Derras, Raman Venkataramani, William Michael Radich
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Patent number: 9165597Abstract: Apparatus and method for recovering data from a multi-channel input signal, such as but not limited to a readback signal from a bit patterned medium (BPM) having a plurality of subtracks. In accordance with some embodiments, a single input single output (SISO) equalizer is adapted to generate equalized outputs responsive to alternating subchannels of the multi-channel input signal. A detector is adapted to generate estimates of data symbols represented by the input signal responsive to the equalized outputs. A switching circuit is adapted to switch in different equalizer coefficients for use by the SISO equalizer for each of the alternating subchannels in the input signal.Type: GrantFiled: June 28, 2013Date of Patent: October 20, 2015Assignee: Seagate Technology LLCInventors: Sundararajan Sankaranarayanan, Raman Venkataramani, Rishi Ahuja
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Publication number: 20150003221Abstract: Apparatus and method for recovering data from a multi-channel input signal, such as but not limited to a readback signal from a bit patterned medium (BPM) having a plurality of subtracks. In accordance with some embodiments, a single input single output (SISO) equalizer is adapted to generate equalized outputs responsive to alternating subchannels of the multi-channel input signal. A detector is adapted to generate estimates of data symbols represented by the input signal responsive to the equalized outputs. A switching circuit is adapted to switch in different equalizer coefficients for use by the SISO equalizer for each of the alternating subchannels in the input signal.Type: ApplicationFiled: June 28, 2013Publication date: January 1, 2015Inventors: Sundararajan Sankaranarayanan, Raman Venkataramani, Rishi Ahuja
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Patent number: 8307267Abstract: In a particular embodiment, a channel detector is disclosed that includes a programmable look-up table (LUT) to relate user bits to channel bits. The programmable LUT is adapted to be implemented on a state trellis of arbitrary radix. The channel detector further includes a sectional precoder coupled to a channel and having access to the programmable LUT. The sectional precoder is adapted to map channel bits to user bits and vice versa using a programmable LUT.Type: GrantFiled: March 14, 2008Date of Patent: November 6, 2012Assignee: Seagate Technology LLCInventors: Raman Venkataramani, Alexander Kuznetsov, Ara Patapoutian
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Patent number: 7864471Abstract: A method includes: writing data to a bit-patterned media at times determined by a clock having a period that is offset from a bit island period by a fixed offset to create one insertion or one deletion approximately within a predetermined number of bit islands, reading the data, and correcting the read data using error correction. An apparatus that implements the method is also provided.Type: GrantFiled: July 24, 2008Date of Patent: January 4, 2011Assignee: Seagate Technology LLCInventors: Deepak Sridhara, Ching He, Arvind Sridharan, Raman Venkataramani
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Publication number: 20100211830Abstract: In a particular embodiment, a storage device includes a data storage medium and a read/write circuit coupled the data storage medium via a communication channel. The read/write circuit includes a formatter circuit to receive a read back signal related to data stored on the data storage medium and to produce an output vector related to the read back signal. The read/write circuit further includes a multiple-input multiple-output (MIMO) equalizer coupled to the formatter circuit and adapted to generate an equalized output vector related to the output vector. The read/write circuit also includes a MIMO detector coupled to the MIMO equalizer and adapted to generate hard bit decisions based on the equalized output vector.Type: ApplicationFiled: February 13, 2009Publication date: August 19, 2010Applicant: Seagate Technology LLCInventors: Sundararajan Sankaranarayanan, Raman Venkataramani
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Publication number: 20100020429Abstract: A method includes: writing data to a bit-patterned media at times determined by a clock having a period that is offset from a bit island period by a fixed offset to create one insertion or one deletion approximately within a predetermined number of bit islands, reading the data, and correcting the read data using error correction. An apparatus that implements the method is also provided.Type: ApplicationFiled: July 24, 2008Publication date: January 28, 2010Applicant: Seagate Technology LLCInventors: Deepak Sridhara, Ching He, Arvind Sridharan, Raman Venkataramani
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Patent number: 7564931Abstract: A method of timing recovery comprises receiving an input signal, sampling the input signal to produce a plurality of signal samples, detecting the samples to produce an output signal, and controlling timing of the sampling in response to a maximum-likelihood estimation of timing error between an actual sampling time instant and a desired sampling time instant. Apparatus that performs the method is also provided.Type: GrantFiled: May 10, 2005Date of Patent: July 21, 2009Assignee: Seagate Technology LLCInventors: Raman Venkataramani, Mehmet Fatih Erden