Patents by Inventor Ramandeep S. Sawhney

Ramandeep S. Sawhney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor memory with wordline timing
    Patent number: 7359258
    Abstract: A semiconductor memory with wordline timing, which links activating a wordline to an isolation signal. The isolation signal is applied to a memory section adjacent the memory section containing the wordline to be activated. Upon such an isolation signal shifting low and isolating the adjacent memory section, a timing circuit triggers a wordline decoder to activate a select wordline. The timing circuit prevents activation of the wordline decoder until the isolation signal is received.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: April 15, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Ramandeep S. Sawhney
  • Semiconductor memory with wordline timing
    Patent number: 7349270
    Abstract: A semiconductor memory with wordline timing, which links activating a wordline to an isolation signal. The isolation signal is applied to a memory section adjacent the memory section containing the wordline to be activated. Upon such an isolation signal shifting low and isolating the adjacent memory section, a timing circuit triggers a wordline decoder to activate a select wordline. The timing circuit prevents activation of the wordline decoder until the isolation signal is received.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: March 25, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Ramandeep S. Sawhney
  • Semiconductor memory with wordline timing
    Patent number: 7327618
    Abstract: A semiconductor memory with wordline timing, which links activating a wordline to an isolation signal. The isolation signal is applied to a memory section adjacent the memory section containing the wordline to be activated. Upon such an isolation signal shifting low and isolating the adjacent memory section, a timing circuit triggers a wordline decoder to activate a select wordline. The timing circuit prevents activation of the wordline decoder until the isolation signal is received.
    Type: Grant
    Filed: January 25, 2006
    Date of Patent: February 5, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Ramandeep S. Sawhney
  • Semiconductor memory with wordline timing
    Patent number: 7042775
    Abstract: A semiconductor memory with wordline timing, which links activating a wordline to an isolation signal. The isolation signal is applied to a memory section adjacent the memory section containing the wordline to be activated. Upon such an isolation signal shifting low and isolating the adjacent memory section, a timing circuit triggers a wordline decoder to activate a select wordline. The timing circuit prevents activation of the wordline decoder until the isolation signal is received.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: May 9, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Ramandeep S. Sawhney
  • Memory devices with reduced power consumption refresh cycles
    Patent number: 6865131
    Abstract: Systems, devices, structures, and methods are described that reduce energy consumption during a refresh cycle in a memory device. An isolation signal is held in a non-energized state until the it is determined that another action is to be performed on the section of memory associated with the isolation signal. The isolation accordingly cycles from an energized state to a non-energized state and back for each complete refresh cycle in the section of memory.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: March 8, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Ramandeep S. Sawhney
  • Semiconductor memory with wordline timing
    Publication number: 20040218444
    Abstract: A semiconductor memory with wordline timing, which links activating a wordline to an isolation signal. The isolation signal is applied to a memory section adjacent the memory section containing the wordline to be activated. Upon such an isolation signal shifting low and isolating the adjacent memory section, a timing circuit triggers a wordline decoder to activate a select wordline. The timing circuit prevents activation of the wordline decoder until the isolation signal is received.
    Type: Application
    Filed: May 26, 2004
    Publication date: November 4, 2004
    Applicant: Micron Technology, Inc.
    Inventor: Ramandeep S. Sawhney
  • Semiconductor memory with wordline timing
    Patent number: 6788614
    Abstract: A semiconductor memory with wordline timing, which links activating a wordline to an isolation signal. The isolation signal is applied to a memory section adjacent the memory section containing the wordline to be activated. Upon such an isolation signal shifting low and isolating the adjacent memory section, a timing circuit triggers a wordline decoder to activate a select wordline. The timing circuit prevents activation of the wordline decoder until the isolation signal is received.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: September 7, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Ramandeep S. Sawhney
  • Memory devices with reduced power consumption refresh cycles
    Publication number: 20030206464
    Abstract: Systems, devices, structures, and methods are described that reduce energy consumption during a refresh cycle in a memory device. An isolation signal is held in a non-energized state until the it is determined that another action is to be performed on the section of memory associated with the isolation signal. The isolation accordingly cycles from an energized state to a non-energized state and back for each complete refresh cycle in the section of memory.
    Type: Application
    Filed: May 20, 2003
    Publication date: November 6, 2003
    Applicant: Micron Technology, Inc.
    Inventor: Ramandeep S. Sawhney
  • Memory devices with reduced power consumption refresh cycles
    Patent number: 6567332
    Abstract: Systems, devices, structures, and methods are described that reduce energy consumption during a refresh cycle in a memory device. An isolation signal is held in a non-energized state until the it is determined that another action is to be performed on the section of memory associated with the isolation signal. The isolation accordingly cycles from an energized state to a non-energized state and back for each complete refresh cycle in the section of memory.
    Type: Grant
    Filed: March 15, 2001
    Date of Patent: May 20, 2003
    Assignee: Micron Technology, Inc.
    Inventor: Ramandeep S. Sawhney
  • Semiconductor memory with wordline timing
    Publication number: 20020191478
    Abstract: A semiconductor memory with wordline timing, which links activating a wordline to an isolation signal. The isolation signal is applied to a memory section adjacent the memory section containing the wordline to be activated. Upon such an isolation signal shifting low and isolating the adjacent memory section, a timing circuit triggers a wordline decoder to activate a select wordline. The timing circuit prevents activation of the wordline decoder until the isolation signal is received.
    Type: Application
    Filed: June 14, 2001
    Publication date: December 19, 2002
    Applicant: Micron Technology, Inc.
    Inventor: Ramandeep S. Sawhney
  • Memory devices with reduced power consumption refresh cycles
    Publication number: 20020133663
    Abstract: Systems, devices, structures, and methods are described that reduce energy consumption during a refresh cycle in a memory device. An isolation signal is held in a non-energized state until the it is determined that another action is to be performed on the section of memory associated with the isolation signal. The isolation accordingly cycles from an energized state to a non-energized state and back for each complete refresh cycle in the section of memory.
    Type: Application
    Filed: March 15, 2001
    Publication date: September 19, 2002
    Applicant: Micron Technology, Inc.
    Inventor: Ramandeep S. Sawhney