Patents by Inventor Rambod Jacoby

Rambod Jacoby has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220333950
    Abstract: Systems and methods for vehicle-based determination of HD map update information. Sensor-equipped vehicles may determine locations of various detected objects relative to the vehicles. Vehicles may also determine the location of reference objects relative to the vehicles, where the location of the reference objects in an absolute coordinate system is also known. The absolute coordinates of various detected objects may then be determined from the absolute position of the reference objects and the locations of other objects relative to the reference objects. Newly-determined absolute locations of detected objects may then be transmitted to HD map services for updating.
    Type: Application
    Filed: April 19, 2021
    Publication date: October 20, 2022
    Inventors: Amir Akbarzadeh, Ruchita Bhargava, Bhaven Dedhia, Rambod Jacoby, Jeffrey Liu, Vaibhav Thukral
  • Patent number: 11055253
    Abstract: This disclosure provides a method that allows connector pins of a USB-C connector to be dynamically repurposed between low bandwidth USB2 traffic and high bandwidth USB3 traffic. USB-C devices can negotiate the use of these pins for a dynamic transition to another function or functions. The pins can be the four center connector pins of a USB-C connection, pins A6, A7, B6, B7, that are originally designated as USB 2.0 differential pairs Changing the function of the pins provides flexibility for communicating using USB-C connectors. For example, the disclosed method/device/system can be used to support high-resolution cameras and sensors in high-resolution virtual reality headsets via a single USB-C connection instead of a user having to connect multiple cables.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: July 6, 2021
    Assignee: Nvidia Corporation
    Inventors: Luc Bisson, Rambod Jacoby, Mark Overby
  • Patent number: 10761582
    Abstract: A computer system comprising: a graphics processor, a display controller comprising a display-local frame buffer, a display device, and a memory. The memory stores instructions, that when executed by the computer system, perform a method of entering a power management state. The method comprises detecting that the computer system is idle and optional proximity detector for determining if a user is present in front of the system. With the computer system idle, and the user in proximity of the system, the display-local frame buffer is activated. Display information transmitted by the graphics processor is stored in the display-local frame buffer. Initially a power reduction state is initiated for the graphics subsystem including the graphics processor, and the display device is placed in a self-refresh state with the display self-refreshing from information stored in the local frame buffer.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: September 1, 2020
    Assignee: Nvidia Corporation
    Inventors: David Wyatt, Rambod Jacoby
  • Publication number: 20200242070
    Abstract: This disclosure provides a method that allows connector pins of a USB-C connector to be dynamically repurposed between low bandwidth USB2 traffic and high bandwidth USB3 traffic. USB-C devices can negotiate the use of these pins for a dynamic transition to another function or functions. The pins can be the four center connector pins of a USB-C connection, pins A6, A7, B6, B7, that are originally designated as USB 2.0 differential pairs Changing the function of the pins provides flexibility for communicating using USB-C connectors. For example, the disclosed method/device/system can be used to support high-resolution cameras and sensors in high-resolution virtual reality headsets via a single USB-C connection instead of a user having to connect multiple cables.
    Type: Application
    Filed: October 17, 2018
    Publication date: July 30, 2020
    Inventors: Luc Bisson, Rambod Jacoby, Mark Overby
  • Patent number: 9092220
    Abstract: A computer system comprising a graphics processor, a frame buffer, a display device, a system agent operable to detect an absence of active software applications and system configurations capable of rendering a disruptive user experience during system suspend, and a memory for storing instructions, that when executed perform a method of entering a power conservation state. The method comprises detecting a system idle event, activating the frame buffer, and storing display information in the frame buffer from the graphics processor. The method further comprises initiating a power reduction state for the graphics processor, self-refreshing the display device during the power reduction state with the display information stored in the frame buffer, and initiating a system suspend comprising a power reduction state for the computer system provided the system agent detects the absence of disruptive software and system configurations.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: July 28, 2015
    Assignee: NVIDIA CORPORATION
    Inventors: David Wyatt, Rambod Jacoby
  • Patent number: 8941672
    Abstract: Embodiments of the present disclosure provide techniques for identifying a display when a graphics processing unit (GPU) connected to the display via a display control bus is in a low power state. By providing a separate microcontroller with a parallel connection to the display control bus, the microcontroller may detect the presence of a display device even when the GPU is in the low power state. In response to detecting the display device, the microcontroller may notify a motherboard chipset (e.g., via an interrupt) prompting the motherboard chipset to initiate a sequence to bring the GPU out of the low power state.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: January 27, 2015
    Assignee: NVIDIA Corporation
    Inventors: Rambod Jacoby, David Wyatt, Yu Qing Cheng, Ludger Mimberg
  • Publication number: 20140184603
    Abstract: A system and method of scalable resolution display are presented. Embodiments of the present invention are operable to partition the native resolution (e.g., available pixel density) of a high pixel density display screen into multiple display regions (windows) in a manner such that each partitioned display region is capable of independently displaying scaled output with respect to its allotted native resolution. As such, both high pixel count images and “low” pixel count images may be displayed simultaneously within the same high pixel density display screen in a manner that enhances the user's visual experience.
    Type: Application
    Filed: December 27, 2012
    Publication date: July 3, 2014
    Applicant: NVIDIA CORPORATION
    Inventor: Rambod Jacoby
  • Patent number: 8635480
    Abstract: In a computer system with multiple processing units, power to one or more of the processing units is turned off while the other processing units remain powered on. The processing unit that is powered off may be a GPU on a graphics adapter card, and power to this GPU is controlled by turning on and off the power supplied through a voltage regulator. With this configuration, power to the GPU on the graphics adapter card can be turned off when it is not in use or when it is being used for graphics processing that another graphics processor can handle.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: January 21, 2014
    Assignee: Nvidia Corporation
    Inventors: Ludger Mimberg, David G. Reed, David Wyatt, Gary D. Hicok, Rambod Jacoby
  • Patent number: 8610732
    Abstract: A system and method for facilitating access to graphics memory wherein the graphics memory can be shared between a graphics processor and general system application. The method includes detecting an idle state of a graphics processing unit (GPU). The GPU uses graphics memory operable for storing graphics data. The method further includes determining an amount of available memory of the graphics memory of the GPU and signaling an operating system regarding the available memory. Memory data transfers are then received to store data into the available memory of the graphics memory wherein the data is related to general system application. Memory accesses to the available memory of the GPU are translated into a suitable format and executed so that the graphics memory is shared between the GPU and the operating system.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: December 17, 2013
    Assignee: Nvidia Corporation
    Inventor: Rambod Jacoby
  • Publication number: 20130054998
    Abstract: A computer system comprising a graphics processor, a frame buffer, a display device, a system agent operable to detect an absence of active software applications and system configurations capable of rendering a disruptive user experience during system suspend, and a memory for storing instructions, that when executed perform a method of entering a power conservation state. The method comprises detecting a system idle event, activating the frame buffer, and storing display information in the frame buffer from the graphics processor. The method further comprises initiating a power reduction state for the graphics processor, self-refreshing the display device during the power reduction state with the display information stored in the frame buffer, and initiating a system suspend comprising a power reduction state for the computer system provided the system agent detects the absence of disruptive software and system configurations.
    Type: Application
    Filed: September 30, 2011
    Publication date: February 28, 2013
    Applicant: Nvidia Corporation
    Inventors: David Wyatt, Rambod Jacoby
  • Publication number: 20130054997
    Abstract: A computer system comprising: a graphics processor, a display controller comprising a display-local frame buffer, a display device, and a memory. The memory stores instructions, that when executed by the computer system, perform a method of entering a power management state. The method comprises detecting that the computer system is idle and optional proximity detector for determining if a user is present in front of the system. With the computer system idle, and the user in proximity of the system, the display-local frame buffer is activated. Display information transmitted by the graphics processor is stored in the display-local frame buffer. Initially a power reduction state is initiated for the graphics subsystem including the graphics processor, and the display device is placed in a self-refresh state with the display self-refreshing from information stored in the local frame buffer.
    Type: Application
    Filed: September 30, 2011
    Publication date: February 28, 2013
    Applicant: NVIDIA CORPORATION
    Inventors: David Wyatt, Rambod Jacoby
  • Patent number: 7827333
    Abstract: One embodiment of the present invention sets forth a technique to determine a bus address for an add-in card on a System Management bus (SMbus) that includes a hybrid microcontroller (hEC) and discrete graphics processing unit (dGPU). A graphics driver requests the System Basic Input/Output System (SBIOS) for a list of available slave addresses. The graphics driver receives the list and selects an available slave address to be assigned to the hEC. The graphics driver assigns the selected address to the hEC through an Inter-Integrated Circuit bus backdoor. The graphics driver then passes the selected address back to the SBIOS and the selected address is removed from the list of available addresses. Advantageously, this approach to dynamically assigning bus addresses provides compatibility with different types of hECs as well as with different motherboard configurations and other SMbus devices.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: November 2, 2010
    Assignee: NVIDIA Corporation
    Inventors: David Wyatt, Hon Fei Chong, Rambod Jacoby
  • Publication number: 20100149199
    Abstract: A system and method for facilitating access to graphics memory wherein the graphics memory can be shared between a graphics processor and general system application. The method includes detecting an idle state of a graphics processing unit (GPU). The GPU uses graphics memory operable for storing graphics data. The method further includes determining an amount of available memory of the graphics memory of the GPU and signaling an operating system regarding the available memory. Memory data transfers are then received to store data into the available memory of the graphics memory wherein the data is related to general system application. Memory accesses to the available memory of the GPU are translated into a suitable format and executed so that the graphics memory is shared between the GPU and the operating system.
    Type: Application
    Filed: December 11, 2008
    Publication date: June 17, 2010
    Applicant: NVIDIA CORPORATION
    Inventor: Rambod Jacoby
  • Patent number: 7698489
    Abstract: Embodiments of the present disclosure provide techniques for dynamically turning off bus signals driven into a graphics processing unit (GPU) when the GPU is in a low power state. The GPU may be located on a graphics card mounted to a motherboard by a bus, such as a PCI-Express bus.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: April 13, 2010
    Assignee: NVIDIA Corporation
    Inventors: Rambod Jacoby, Charles Buffington
  • Publication number: 20090319380
    Abstract: The subject matter disclosed herein provides methods and apparatus, including computer program products, for facilitating collaboration between a variety of entities involved in real estate transactions. In one aspect there is provided a method. The method may include electronically receiving data from a plurality of users; calculating one or more buyer-personalized cash flow variables based on the received data; and providing an output, wherein the output includes the buyer-personalized cash flow variables formatted as a personalized monthly cash flow report.
    Type: Application
    Filed: June 18, 2009
    Publication date: December 24, 2009
    Inventors: Rambod Jacoby, Jessica Esther Intrator
  • Patent number: 7633277
    Abstract: One embodiment of the present invention sets forth a system and a method for testing the worst-case transients in the output voltage produced by a switching-mode power supply (SMPS). The system includes an SMPS and a dynamic load generator (DLG). The SMPS converts the input voltage into the output voltage by using a top field-effect transistor (FET) and a bottom FET. The worst case transients occur when the load being provided to the SMPS is turned on or off at the same time the top FET is turned off. The DLG is configured to monitor the edge of the gate voltage of the top FET and to turn the load provided to the SMPS on or off when the edge of the gate voltage of the top FET is falling. Consequently, the disclosed system is able to test the worst-case transients in the output voltage produced by the SMPS in a manner that is more reliable than prior art approaches.
    Type: Grant
    Filed: May 15, 2007
    Date of Patent: December 15, 2009
    Assignee: NVIDIA Corporation
    Inventor: Rambod Jacoby