Patents by Inventor Ramesh Bhandari

Ramesh Bhandari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11467342
    Abstract: The present invention provides a method for converting the topological charge of an orbital angular momentum mode of light to an opposite topological charge by applying the light to a spool of optical fiber having a bend radius R and length L. The length of the fiber used to form the spool is defined by ½ the bend-induced 2? walk-off length Ll,mb(2?). The length of the fiber L and the bend radius R of the spool may be adjusted to account for an ellipticity-induced 2? walk-off length Ll,m3(2?). Using the proportionality rules, Ll,mb(2?)?R2l and Ll,m3(2?)???l adjustments to account for ellipticity induced 2? walk-off length Ll,me(2?), or to account for a change in the bend radius ?R of the spool can be easily determined.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: October 11, 2022
    Inventor: Ramesh Bhandari
  • Publication number: 20150026975
    Abstract: A multilayer printed wiring board includes a core base material having a penetrating portion, a low-thermal-expansion substrate accommodated inside the penetrating portion of the core base material and having a first surface for mounting a semiconductor element and a second surface on the opposite side of the first surface, a first through-hole conductor provided inside the low-thermal-expansion substrate and provided for electrical connection between the first surface and the second surface of the low-thermal-expansion substrate, a filler filled in a gap between the low-thermal-expansion substrate and an inner wall of the core base material, and a wiring layer formed on at least one of the first surface and the second surface of the low-thermal-expansion substrate and having a resin insulation layer and a conductive layer. The wiring layer has a via conductor connecting the first through-hole conductor and the conductive layer.
    Type: Application
    Filed: August 1, 2014
    Publication date: January 29, 2015
    Applicant: Ibiden Co., Ltd.
    Inventors: Takashi Kariya, Kazuhiro Yoshikawa, Daiki Komatsu, Ramesh Bhandari
  • Patent number: 8829355
    Abstract: A multilayer printed wiring board includes a core base material having a penetrating portion, a low-thermal-expansion substrate accommodated inside the penetrating portion of the core base material and having a first surface for mounting a semiconductor element and a second surface on the opposite side of the first surface, a first through-hole conductor provided inside the low-thermal-expansion substrate and provided for electrical connection between the first surface and the second surface of the low-thermal-expansion substrate, a filler filled in a gap between the low-thermal-expansion substrate and an inner wall of the core base material, and a wiring layer formed on at least one of the first surface and the second surface of the low-thermal-expansion substrate and having a resin insulation layer and a conductive layer. The wiring layer has a via conductor connecting the first through-hole conductor and the conductive layer.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: September 9, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Takashi Kariya, Kazuhiro Yoshikawa, Daiki Komatsu, Ramesh Bhandari
  • Patent number: 8233397
    Abstract: A device and method of minimally incrementing and decrementing the weights of a minimal number of links in a network to cause a link/node that is not in the shortest path in the network to be in the shortest path by determining the shortest path with link/node, identifying links in this path that are not in the shortest path without link/node, decrementing identified links to make the path the shortest path, identifying a link in the shortest path without link/node not in the path with link/node, incrementing the link, redoing these steps to determine a number of links and modifications to links that would cause the link/node to appear in the shortest path, identifying the set of links and modifications with the fewest links, and modifying the network in accordance with the identified set.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: July 31, 2012
    Assignee: The United States of America as represented by the Director, National Security Agency
    Inventor: Ramesh Bhandari
  • Publication number: 20100243299
    Abstract: A multilayer printed wiring board includes a core base material having a penetrating portion, a low-thermal-expansion substrate accommodated inside the penetrating portion of the core base material and having a first surface for mounting a semiconductor element and a second surface on the opposite side of the first surface, a first through-hole conductor provided inside the low-thermal-expansion substrate and provided for electrical connection between the first surface and the second surface of the low-thermal-expansion substrate, a filler filled in a gap between the low-thermal-expansion substrate and an inner wall of the core base material, and a wiring layer formed on at least one of the first surface and the second surface of the low-thermal-expansion substrate and having a resin insulation layer and a conductive layer. The wiring layer has a via conductor connecting the first through-hole conductor and the conductive layer.
    Type: Application
    Filed: October 30, 2009
    Publication date: September 30, 2010
    Applicant: IBIDEN CO., LTD.
    Inventors: Takashi Kariya, Kazuhiro Yoshikawa, Daiki Komatsu, Ramesh Bhandari