Patents by Inventor Ramesh Doddaiah
Ramesh Doddaiah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20260236513Abstract: An apparatus comprises at least one processing device configured to obtain a query comprising search text identifying one or more error codes in one or more system logs associated with information technology assets operating in an information technology infrastructure. The at least one processing device is also configured to select, as context for the query, a subset of a plurality of document chunks each comprising a portion of content of one or more documents containing information associated with the error codes. The at least one processing device is further configured to generate and apply a prompt for input to a machine learning system comprising the selected subset of the document chunks to generate an output, and to provide an answer to the query based on the output of the machine learning system, the answer comprising a natural language description of at least one of the error codes.Type: ApplicationFiled: February 10, 2025Publication date: August 13, 2026Inventors: Sumanta Kashyapi, Ramesh Doddaiah, David C. Sydow, Shreyans Jasoriya
-
Publication number: 20260219980Abstract: An apparatus comprises at least one processing device configured to obtain monitoring data for a storage system including telemetry data for a set of metrics including a latency metric and additional metrics. The at least one processing device is also configured to determine metric-specific anomalous data points utilizing machine learning-based univariate anomaly detectors, and to determine metric-generic anomalous data points utilizing a machine learning-based multivariate anomaly detector.Type: ApplicationFiled: January 30, 2025Publication date: July 30, 2026Inventors: Sumanta Kashyapi, Ramesh Doddaiah, Michael Barnes, David C. Sydow, Robert Duncan Harper, Shreyans Jasoriya
-
Publication number: 20260220006Abstract: One or more aspects of the present disclosure relate to optimizing cache utilization in storage arrays with remote replication. When a write operation is received at a local array, write data is stored in an unmirrored cache slot rather than traditional mirrored slots. The system initiates parallel operations: a synchronous cut-through write to temporary disk space in the local array and a remote write to mirrored cache slots in a remote array. The cut-through write bypasses the backend adapter to write directly to disk, completing in microseconds compared to milliseconds for remote writes. After receiving acknowledgments from both operations, a write completion is sent to the host. The system maintains fault tolerance through multiple redundancy mechanisms while reducing DRAM usage from four copies to three across the primary and secondary arrays.Type: ApplicationFiled: January 27, 2025Publication date: July 30, 2026Applicant: Dell Products L.P.Inventors: Mark Halstead, Ramesh Doddaiah, Mohammed Asher, Sandeep Chandrashekhara
-
Patent number: 12693950Abstract: One or more aspects of the present disclosure relate to optimizing cache utilization in storage arrays with remote replication. When a write operation is received at a local array, write data is stored in an unmirrored cache slot rather than traditional mirrored slots. The system initiates parallel operations: a synchronous cut-through write to temporary disk space in the local array and a remote write to mirrored cache slots in a remote array. The cut-through write bypasses the backend adapter to write directly to disk, completing in microseconds compared to milliseconds for remote writes. After receiving acknowledgments from both operations, a write completion is sent to the host. The system maintains fault tolerance through multiple redundancy mechanisms while reducing DRAM usage from four copies to three across the primary and secondary arrays.Type: GrantFiled: January 27, 2025Date of Patent: July 28, 2026Assignee: Dell Products L.P.Inventors: Mark Halstead, Ramesh Doddaiah, Mohammed Asher, Sandeep Chandrashekhara
-
Publication number: 20260211726Abstract: A method for managing data processing units (DPU) ports in a DPU includes receiving, at a multi-variant time series (MVTS) system, first data on input/output (I/O) statistics on a host adapter. The method further includes receiving, at the MVTS system, second data from the DPU. The second data includes a status and power consumption of each DPU port of the DPU. Moreover, the method includes after receiving the first data and the second data, forming, with the MVTS system, an activation schedule for each DPU port in the DPU with the first data and the second data as inputs. The activation schedule specifies whether any given DPU port is activated or deactivated over a series of time periods. Further, the method includes deactivating, at a first time period, the DPU ports indicated to be deactivated by the activation schedule.Type: ApplicationFiled: January 22, 2025Publication date: July 23, 2026Inventors: Ramesh Doddaiah, Jonathan Ichael Krasner, Xiangping Chen
-
Publication number: 20260211580Abstract: A method for operating a model on a storage array includes receiving, from a host, a registration for the model to cause the model to be stored in the storage array. The method also includes receiving a command and, in response to receiving the command, activating the model. The method further includes transmitting a tag to notify the host that the model is activated. In addition, the method includes receiving a prompt from the host that includes an identifier for relevant data stored on the storage array and instructions to form an inference based on the relevant data. Moreover, the method includes forming, based on the prompt, the inference using the model, where the model is executed on a computing resource of the storage array and the relevant data is used as an input for the model. Further, the method includes transmitting the inference to the host.Type: ApplicationFiled: January 17, 2025Publication date: July 23, 2026Inventors: Ramesh Doddaiah, Xiangping Chen, Jonathan Ichael Krasner
-
Publication number: 20260212439Abstract: A method for storing files includes receiving, at a central processing unit (CPU) of a host, a write request for a first data segment located in a graphics processing unit (GPU) data buffer to remote storage servers. The method further includes making a determination that the GPU is available for erasure coding (EC) of the first data segment. In addition, the method includes allocating in the GPU, an EC buffer. Moreover, the method includes engaging an EC calculation to cause the GPU to execute the EC calculation using the EC buffer to cause the GPU to generate an EC data segment associated with the first data segment. Further, the method includes initiating a path between the GPU and the remote storage servers to cause the first data segment and the EC data segment to transfer directly from the GPU to a location remote to the host.Type: ApplicationFiled: January 22, 2025Publication date: July 23, 2026Inventors: Xiangping Chen, Jonathan Ichael Krasner, Ramesh Doddaiah
-
Patent number: 12688099Abstract: Methods and apparatuses for online replacement of a node enclosure are provided. A storage array system includes a node-pair housed in a node enclosure. Each node of the node-pair are be linked to a network and further linked to each other by external interconnects, independent of the enclosure. The interconnects couple the first storage node to the second storage node externally of the node enclosure. The node-pairs are configured to communicate independently of the node enclosure and the enclosure is replaceable without disruption of communication over the network.Type: GrantFiled: April 5, 2024Date of Patent: July 21, 2026Assignee: Dell Products L.P.Inventors: Earl Medeiros, Julie Zhivich, Jerome Cartmell, James Guyer, Ramesh Doddaiah
-
Publication number: 20260203232Abstract: A pattern-based cache eviction policy leverages I/O access patterns to optimize cache retention for data with predictable read-after-write behavior. The system generates and relies on pattern recognition and predictive analytics to identify the probability and timing of read operations following write operations on the same data blocks. The system enables retention of specific data in cache longer when a read operation is anticipated and evicts specific data when a read operation is not anticipated. A collection of I/O operations is received and analyzed for one or more access patterns. A predictive model is generated based on the one or more access patterns and is configured to forecast a future I/O operation. An I/O operation is input to the predictive model to determine an eviction event.Type: ApplicationFiled: January 15, 2025Publication date: July 16, 2026Applicant: Dell Products L.P.Inventors: Arieh Don, Krishna Deepak Nuthakki, Ramesh Doddaiah
-
Publication number: 20260205383Abstract: A method for adjusting data processing unit (DPU) utilization of a secondary storage array, the method includes sampling, input-output of a primary storage array and a secondary storage array, forecasting, based on the sampling, demand for the primary storage array and the secondary storage array, where the primary storage array includes a primary DPU core matrix and the secondary storage array includes a secondary DPU core matrix, and combining the forecasting of the primary storage array and secondary storage array. The method further includes making a second determination, based on the combined forecast, that at least one service level (SL) of multiple SLs associated with the secondary DPU core matrix is out of compliance, identifying at least one DPU currently operating at a first SL, and adjusting operation of the at least one DPU to operate from the first SL to a second SL of the multiple SLs.Type: ApplicationFiled: January 15, 2025Publication date: July 16, 2026Inventors: Ramesh Doddaiah, Jonathan I. Krasner, Xiangping Chen
-
Publication number: 20260203226Abstract: Disclosed are systems and methods for enhancing local node performance in a storage system through offloading cache replacement tasks to remote nodes. A periodic time-series analysis of CPU cycle utilization and network latency is conducted on one or more arrays to identify and/or forecast underutilized nodes in the one or more arrays. A first array detects a shortage of available cache slots in an allocation queue and identifies underutilized remote nodes in either its own array or another array. The array shares the metadata pages with the remote node. A worker thread on the remote node runs a search algorithm on the received meta data pages and creates a list of candidate replacement memory slots.Type: ApplicationFiled: January 15, 2025Publication date: July 16, 2026Applicant: Dell Products L.P.Inventors: Kaustubh Sahasrabudhe, Ramesh Doddaiah, Steve Ivester
-
Publication number: 20260202962Abstract: Embodiments disclosed herein relate to selective inline compression of data using data processing units (DPUs) of hosts running on the file system prior to storing the data on a remote storage system. To be compressed by the DPUs of the hosts, data should be not already compressed, the data should not subject to frequent read/write cycles off the remote storage system, and the DPU should have sufficient computing resources to compress the data. A file system is connected to the hosts and the remote storage. The file system provides a file heatmap that forecasts whether the data is frequently accessed. The file heatmap is created using machine learning models. After receiving the file heatmap, the host writes the data to the remote storage system and uses the file heatmap to determine if the data should be compressed.Type: ApplicationFiled: January 16, 2025Publication date: July 16, 2026Inventors: Ramesh Doddaiah, Xiangping Chen, Jonathan Ichael Krasner
-
Patent number: 12684012Abstract: A method, comprising: executing an embedded malware detector, the embedded malware detector being executed inside a first guest operating system, the first guest operating system being executed on a storage processor that is part of a storage system, the storage processor being configured to execute one or more second guest operating systems in addition to the first guest operating system, each of the second guest operating systems being arranged to execute software for reading and/or writing data to one or more storage devices that are provided in the storage system; identifying, by the embedded malware detector, a given one of the storage devices; obtaining, by the embedded malware detector, a snapshot of the given one of the storage devices; mounting, by the embedded malware detector, the snapshot in the first guest operating system; scanning the mounted snapshot for malware.Type: GrantFiled: September 19, 2024Date of Patent: July 14, 2026Assignee: Dell Products L.P.Inventors: Benjamin A. Randolph, Jeremy O'Hare, Bruce Ferjulian, Ramesh Doddaiah
-
Patent number: 12681864Abstract: Disclosed are systems and methods for enhancing local node performance in a storage system through offloading cache replacement tasks to remote nodes. A periodic time-series analysis of CPU cycle utilization and network latency is conducted on one or more arrays to identify and/or forecast underutilized nodes in the one or more arrays. A first array detects a shortage of available cache slots in an allocation queue and identifies underutilized remote nodes in either its own array or another array. The array shares the metadata pages with the remote node. A worker thread on the remote node runs a search algorithm on the received meta data pages and creates a list of candidate replacement memory slots.Type: GrantFiled: January 15, 2025Date of Patent: July 14, 2026Assignee: Dell Products L.P.Inventors: Kaustubh Sahasrabudhe, Ramesh Doddaiah, Steve Ivester
-
Patent number: 12681877Abstract: A method for use in a storage processor, comprising: receiving an I/O request that is associated with a logical block address; allocating a cache slot that corresponds to the logical block address, wherein allocating the cache slot includes: identifying a type of memory that is required to host the cache slot by using one or more configuration settings that are associated with the cache slot, identifying a cache slot that is both available and hosted in the identified type of memory, and assigning the identified cache slot to the logical block address; and executing the I/O request by using the allocated cache slot, wherein using the allocated cache slot includes identifying a memory address that is associated with the cache slot and executing at least one direct memory access (DMA) command that is associated with the allocated cache slot.Type: GrantFiled: March 28, 2024Date of Patent: July 14, 2026Assignee: Dell Products L.P.Inventors: Earl Medeiros, Ramesh Doddaiah
-
Patent number: 12681640Abstract: A method comprising: generating a write-on-write distribution for a plurality of data units in a data entity, the write-on-write distribution including a plurality of buckets, each bucket corresponding to a different write-on-write time range, each bucket having a respective bucket size that is based on a count of ones of the plurality of data units whose respective predicted write-on-write times fall within the bucket's write-on-write time range; identifying one or more utilization metrics of a storage system where the data entity is hosted; classifying a representative bucket size of the write-on-write distribution and the one or more utilization metrics with a machine learning model to predict a replication period for the data entity, the representative bucket size being a bucket size within a predetermined distance from a mean bucket size of the write-on-write distribution; and configuring the storage system to replicate the data entity in accordance with the replication period.Type: GrantFiled: April 11, 2024Date of Patent: July 14, 2026Assignee: Dell Products L.P.Inventors: Sandeep Chandrashekhara, Ramesh Doddaiah, Mohammed Aamir VT, Mohammed Asher
-
Patent number: 12675341Abstract: An information handling system executing a predictive task adjusting and carbon dioxide (CO2) minimizing system may comprise a hardware processor executing code instructions of a time series forecasting engine to predict a future CO2 emissions value for hardware component within a data center within a future time window that exceeds a CO2 threshold value determined for the hardware component where changes in CO2 emissions are due to a forecasted future load of memory accessing functions causing a change in energy consumption, the hardware processor executing code instructions to identify an adjusted forecasted future load of memory accessing functions whose execution is predicted to decrease CO2 emitted during the future time window below the CO2 threshold value, and the network interface device to transmit a workload redistribution instruction for implementing the adjusted forecasted future load of memory accessing functions at the data center.Type: GrantFiled: April 19, 2023Date of Patent: July 7, 2026Assignee: DELL PRODUCTS LPInventors: Deeder M. Aurongzeb, Ramesh Doddaiah, Malathi Ramakrishnan
-
Patent number: 12675394Abstract: Aspects of the present disclosure relate to optimizing atomic operations in storage arrays by selectively enabling fabric-less mode based on device access patterns. In embodiments, whether multi-path software is enabled is determined, and device-level access control mappings are analyzed to identify candidates for fabric-less mode operation. For devices without multi-path software, a fabric-less mode is enabled when mapped to a single board, allowing atomic operations via software locks instead of fabric hardware. When multi-path software is enabled, the embodiments either leverage ALUA states to identify optimized paths or employ time series analysis using ARIMA models to predict IO access patterns. Fabric-less mode is activated when forecasting indicates localized access patterns, significantly improving response time and IOPS by avoiding fabric bandwidth constraints and hardware vendor limitations.Type: GrantFiled: November 18, 2024Date of Patent: July 7, 2026Assignee: Dell Products L.P.Inventors: Kaustubh Sahasrabudhe, Steve Ivester, Ramesh Doddaiah
-
Patent number: 12675511Abstract: A system can obtain a first prompt as output from inputting an alert about a computer system to a first retrieval-augmented generation system (RAG). The system can obtain a first answer as output from inputting the first prompt to a first large language model (LLM). The system can obtain a value maintained by an entity associated with the computing system as output from inputting the alert to a second RAG. The system can obtain a second answer as output from inputting the first answer, the value, and a second prompt to a second LLM, wherein the second LLM comprises the first LLM or another LLM different from the first LLM. The system can obtain a third answer as output from inputting the second answer, user information associated with the entity, and a third prompt to a third LLM. The system can make the third answer available to the entity.Type: GrantFiled: October 16, 2024Date of Patent: July 7, 2026Assignee: Dell Products L.P.Inventors: Ming Qian, Corinne Schulze, Michael Barnes, Ramesh Doddaiah, Sumanta Kashyapi, Frederic Meunier, Jean C. Metcalf, Christopher J. Steinauer
-
Patent number: 12670103Abstract: One or more aspects of the present disclosure relate to paging metadata into memory. In embodiments, a metadata demand score is calculated for each extent of a storage array based on hit forecasts and read forecasts corresponding to input/output (IO) operations targeting each extent. Further, each extent can be ranked based on their respective metadata demand scores. Additionally, metadata can be paged into memory from a storage device of the storage array based on the ranking to reduce metadata page misses. For example, the memory can correspond to a global memory portion of the storage array.Type: GrantFiled: July 29, 2024Date of Patent: June 30, 2026Assignee: Dell Products L.P.Inventors: Owen Martin, Ramesh Doddaiah