Patents by Inventor Ramesh Doddaiah

Ramesh Doddaiah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260267799
    Abstract: One or more aspects of the present disclosure relate to dynamic cache slot management in storage systems. Performance statistics for cache memory segments are analyzed to forecast input/output (IO) activity periods using time-series analysis. Based on the forecasts, source segments having available cache slots and target segments requiring additional cache slots are identified. A donation schedule is determined for temporarily transferring cache slots between segments during predicted IO burst periods, with transfers occurring both within individual boards and across multiple boards. The system monitors various to optimize the timing and quantity of cache slot donations. Cache slots can be transferred between mirrored segments, non-mirrored segments, or between mirrored and non-mirrored segments based on workload demands.
    Type: Application
    Filed: March 10, 2025
    Publication date: September 10, 2026
    Applicant: Dell Products L.P.
    Inventors: Kaustubh Sahasrabudhe, Steve Ivester, Ramesh Doddaiah
  • Patent number: 12724650
    Abstract: A storage array engine has two single-board storage directors with CPU complexes and PCIe switches that are interconnected by a fabric-less PCIe NTB. IO response times of the storage directors are modeled, e.g., as a function of controller memory interface bandwidth utilization, switch utilization, fall-through time of a non-mirrored segment of the volatile memory, central processing unit complex utilization, number of available data slots in the non-mirrored segment of the volatile memory, and average depth of all IO-related queues. Responsive to receipt of an IO, a data slot in either local or remote storage director memory is allocated based on the difference between computed IO response times of the storage directors. The fabric-less link is used to service IOs using remote memory, thereby mitigating additional loading of the local CPU complex.
    Type: Grant
    Filed: December 14, 2023
    Date of Patent: September 1, 2026
    Assignee: Dell Products L.P.
    Inventors: Rong Yu, Earl Medeiros, Thomas Rogers, Ramesh Doddaiah
  • Patent number: 12724811
    Abstract: An apparatus comprises at least one processing device configured to obtain a query comprising search text identifying one or more error codes in one or more system logs associated with information technology assets operating in an information technology infrastructure. The at least one processing device is also configured to select, as context for the query, a subset of a plurality of document chunks each comprising a portion of content of one or more documents containing information associated with the error codes. The at least one processing device is further configured to generate and apply a prompt for input to a machine learning system comprising the selected subset of the document chunks to generate an output, and to provide an answer to the query based on the output of the machine learning system, the answer comprising a natural language description of at least one of the error codes.
    Type: Grant
    Filed: February 10, 2025
    Date of Patent: September 1, 2026
    Assignee: Dell Products L.P.
    Inventors: Sumanta Kashyapi, Ramesh Doddaiah, David C. Sydow, Shreyans Jasoriya
  • Patent number: 12724658
    Abstract: Thread CPU cycle utilization patterns are used to analyze storage array performance problems. Per-thread CPU cycle utilization statistics are monitored, and code path utilizations are counted. Time-series clustering is used to identify code path activity clusters and thread clusters having similar CPU cycle utilization patterns. The most active code paths are selected from each code path activity cluster. The thread clusters that are most highly correlated with the selected code paths are selected and ranked based on CPU cycle utilization.
    Type: Grant
    Filed: January 8, 2024
    Date of Patent: September 1, 2026
    Assignee: Dell Products L.P.
    Inventors: Pankaj Soni, Ramesh Doddaiah, Malak Alshawabkeh, Eddie Tran, Garima Jain
  • Publication number: 20260236513
    Abstract: An apparatus comprises at least one processing device configured to obtain a query comprising search text identifying one or more error codes in one or more system logs associated with information technology assets operating in an information technology infrastructure. The at least one processing device is also configured to select, as context for the query, a subset of a plurality of document chunks each comprising a portion of content of one or more documents containing information associated with the error codes. The at least one processing device is further configured to generate and apply a prompt for input to a machine learning system comprising the selected subset of the document chunks to generate an output, and to provide an answer to the query based on the output of the machine learning system, the answer comprising a natural language description of at least one of the error codes.
    Type: Application
    Filed: February 10, 2025
    Publication date: August 13, 2026
    Inventors: Sumanta Kashyapi, Ramesh Doddaiah, David C. Sydow, Shreyans Jasoriya
  • Publication number: 20260219980
    Abstract: An apparatus comprises at least one processing device configured to obtain monitoring data for a storage system including telemetry data for a set of metrics including a latency metric and additional metrics. The at least one processing device is also configured to determine metric-specific anomalous data points utilizing machine learning-based univariate anomaly detectors, and to determine metric-generic anomalous data points utilizing a machine learning-based multivariate anomaly detector.
    Type: Application
    Filed: January 30, 2025
    Publication date: July 30, 2026
    Inventors: Sumanta Kashyapi, Ramesh Doddaiah, Michael Barnes, David C. Sydow, Robert Duncan Harper, Shreyans Jasoriya
  • Publication number: 20260220006
    Abstract: One or more aspects of the present disclosure relate to optimizing cache utilization in storage arrays with remote replication. When a write operation is received at a local array, write data is stored in an unmirrored cache slot rather than traditional mirrored slots. The system initiates parallel operations: a synchronous cut-through write to temporary disk space in the local array and a remote write to mirrored cache slots in a remote array. The cut-through write bypasses the backend adapter to write directly to disk, completing in microseconds compared to milliseconds for remote writes. After receiving acknowledgments from both operations, a write completion is sent to the host. The system maintains fault tolerance through multiple redundancy mechanisms while reducing DRAM usage from four copies to three across the primary and secondary arrays.
    Type: Application
    Filed: January 27, 2025
    Publication date: July 30, 2026
    Applicant: Dell Products L.P.
    Inventors: Mark Halstead, Ramesh Doddaiah, Mohammed Asher, Sandeep Chandrashekhara
  • Patent number: 12693950
    Abstract: One or more aspects of the present disclosure relate to optimizing cache utilization in storage arrays with remote replication. When a write operation is received at a local array, write data is stored in an unmirrored cache slot rather than traditional mirrored slots. The system initiates parallel operations: a synchronous cut-through write to temporary disk space in the local array and a remote write to mirrored cache slots in a remote array. The cut-through write bypasses the backend adapter to write directly to disk, completing in microseconds compared to milliseconds for remote writes. After receiving acknowledgments from both operations, a write completion is sent to the host. The system maintains fault tolerance through multiple redundancy mechanisms while reducing DRAM usage from four copies to three across the primary and secondary arrays.
    Type: Grant
    Filed: January 27, 2025
    Date of Patent: July 28, 2026
    Assignee: Dell Products L.P.
    Inventors: Mark Halstead, Ramesh Doddaiah, Mohammed Asher, Sandeep Chandrashekhara
  • Publication number: 20260211726
    Abstract: A method for managing data processing units (DPU) ports in a DPU includes receiving, at a multi-variant time series (MVTS) system, first data on input/output (I/O) statistics on a host adapter. The method further includes receiving, at the MVTS system, second data from the DPU. The second data includes a status and power consumption of each DPU port of the DPU. Moreover, the method includes after receiving the first data and the second data, forming, with the MVTS system, an activation schedule for each DPU port in the DPU with the first data and the second data as inputs. The activation schedule specifies whether any given DPU port is activated or deactivated over a series of time periods. Further, the method includes deactivating, at a first time period, the DPU ports indicated to be deactivated by the activation schedule.
    Type: Application
    Filed: January 22, 2025
    Publication date: July 23, 2026
    Inventors: Ramesh Doddaiah, Jonathan Ichael Krasner, Xiangping Chen
  • Publication number: 20260211580
    Abstract: A method for operating a model on a storage array includes receiving, from a host, a registration for the model to cause the model to be stored in the storage array. The method also includes receiving a command and, in response to receiving the command, activating the model. The method further includes transmitting a tag to notify the host that the model is activated. In addition, the method includes receiving a prompt from the host that includes an identifier for relevant data stored on the storage array and instructions to form an inference based on the relevant data. Moreover, the method includes forming, based on the prompt, the inference using the model, where the model is executed on a computing resource of the storage array and the relevant data is used as an input for the model. Further, the method includes transmitting the inference to the host.
    Type: Application
    Filed: January 17, 2025
    Publication date: July 23, 2026
    Inventors: Ramesh Doddaiah, Xiangping Chen, Jonathan Ichael Krasner
  • Publication number: 20260212439
    Abstract: A method for storing files includes receiving, at a central processing unit (CPU) of a host, a write request for a first data segment located in a graphics processing unit (GPU) data buffer to remote storage servers. The method further includes making a determination that the GPU is available for erasure coding (EC) of the first data segment. In addition, the method includes allocating in the GPU, an EC buffer. Moreover, the method includes engaging an EC calculation to cause the GPU to execute the EC calculation using the EC buffer to cause the GPU to generate an EC data segment associated with the first data segment. Further, the method includes initiating a path between the GPU and the remote storage servers to cause the first data segment and the EC data segment to transfer directly from the GPU to a location remote to the host.
    Type: Application
    Filed: January 22, 2025
    Publication date: July 23, 2026
    Inventors: Xiangping Chen, Jonathan Ichael Krasner, Ramesh Doddaiah
  • Patent number: 12688099
    Abstract: Methods and apparatuses for online replacement of a node enclosure are provided. A storage array system includes a node-pair housed in a node enclosure. Each node of the node-pair are be linked to a network and further linked to each other by external interconnects, independent of the enclosure. The interconnects couple the first storage node to the second storage node externally of the node enclosure. The node-pairs are configured to communicate independently of the node enclosure and the enclosure is replaceable without disruption of communication over the network.
    Type: Grant
    Filed: April 5, 2024
    Date of Patent: July 21, 2026
    Assignee: Dell Products L.P.
    Inventors: Earl Medeiros, Julie Zhivich, Jerome Cartmell, James Guyer, Ramesh Doddaiah
  • Publication number: 20260203232
    Abstract: A pattern-based cache eviction policy leverages I/O access patterns to optimize cache retention for data with predictable read-after-write behavior. The system generates and relies on pattern recognition and predictive analytics to identify the probability and timing of read operations following write operations on the same data blocks. The system enables retention of specific data in cache longer when a read operation is anticipated and evicts specific data when a read operation is not anticipated. A collection of I/O operations is received and analyzed for one or more access patterns. A predictive model is generated based on the one or more access patterns and is configured to forecast a future I/O operation. An I/O operation is input to the predictive model to determine an eviction event.
    Type: Application
    Filed: January 15, 2025
    Publication date: July 16, 2026
    Applicant: Dell Products L.P.
    Inventors: Arieh Don, Krishna Deepak Nuthakki, Ramesh Doddaiah
  • Publication number: 20260205383
    Abstract: A method for adjusting data processing unit (DPU) utilization of a secondary storage array, the method includes sampling, input-output of a primary storage array and a secondary storage array, forecasting, based on the sampling, demand for the primary storage array and the secondary storage array, where the primary storage array includes a primary DPU core matrix and the secondary storage array includes a secondary DPU core matrix, and combining the forecasting of the primary storage array and secondary storage array. The method further includes making a second determination, based on the combined forecast, that at least one service level (SL) of multiple SLs associated with the secondary DPU core matrix is out of compliance, identifying at least one DPU currently operating at a first SL, and adjusting operation of the at least one DPU to operate from the first SL to a second SL of the multiple SLs.
    Type: Application
    Filed: January 15, 2025
    Publication date: July 16, 2026
    Inventors: Ramesh Doddaiah, Jonathan I. Krasner, Xiangping Chen
  • Publication number: 20260203226
    Abstract: Disclosed are systems and methods for enhancing local node performance in a storage system through offloading cache replacement tasks to remote nodes. A periodic time-series analysis of CPU cycle utilization and network latency is conducted on one or more arrays to identify and/or forecast underutilized nodes in the one or more arrays. A first array detects a shortage of available cache slots in an allocation queue and identifies underutilized remote nodes in either its own array or another array. The array shares the metadata pages with the remote node. A worker thread on the remote node runs a search algorithm on the received meta data pages and creates a list of candidate replacement memory slots.
    Type: Application
    Filed: January 15, 2025
    Publication date: July 16, 2026
    Applicant: Dell Products L.P.
    Inventors: Kaustubh Sahasrabudhe, Ramesh Doddaiah, Steve Ivester
  • Publication number: 20260202962
    Abstract: Embodiments disclosed herein relate to selective inline compression of data using data processing units (DPUs) of hosts running on the file system prior to storing the data on a remote storage system. To be compressed by the DPUs of the hosts, data should be not already compressed, the data should not subject to frequent read/write cycles off the remote storage system, and the DPU should have sufficient computing resources to compress the data. A file system is connected to the hosts and the remote storage. The file system provides a file heatmap that forecasts whether the data is frequently accessed. The file heatmap is created using machine learning models. After receiving the file heatmap, the host writes the data to the remote storage system and uses the file heatmap to determine if the data should be compressed.
    Type: Application
    Filed: January 16, 2025
    Publication date: July 16, 2026
    Inventors: Ramesh Doddaiah, Xiangping Chen, Jonathan Ichael Krasner
  • Patent number: 12684012
    Abstract: A method, comprising: executing an embedded malware detector, the embedded malware detector being executed inside a first guest operating system, the first guest operating system being executed on a storage processor that is part of a storage system, the storage processor being configured to execute one or more second guest operating systems in addition to the first guest operating system, each of the second guest operating systems being arranged to execute software for reading and/or writing data to one or more storage devices that are provided in the storage system; identifying, by the embedded malware detector, a given one of the storage devices; obtaining, by the embedded malware detector, a snapshot of the given one of the storage devices; mounting, by the embedded malware detector, the snapshot in the first guest operating system; scanning the mounted snapshot for malware.
    Type: Grant
    Filed: September 19, 2024
    Date of Patent: July 14, 2026
    Assignee: Dell Products L.P.
    Inventors: Benjamin A. Randolph, Jeremy O'Hare, Bruce Ferjulian, Ramesh Doddaiah
  • Patent number: 12681864
    Abstract: Disclosed are systems and methods for enhancing local node performance in a storage system through offloading cache replacement tasks to remote nodes. A periodic time-series analysis of CPU cycle utilization and network latency is conducted on one or more arrays to identify and/or forecast underutilized nodes in the one or more arrays. A first array detects a shortage of available cache slots in an allocation queue and identifies underutilized remote nodes in either its own array or another array. The array shares the metadata pages with the remote node. A worker thread on the remote node runs a search algorithm on the received meta data pages and creates a list of candidate replacement memory slots.
    Type: Grant
    Filed: January 15, 2025
    Date of Patent: July 14, 2026
    Assignee: Dell Products L.P.
    Inventors: Kaustubh Sahasrabudhe, Ramesh Doddaiah, Steve Ivester
  • Patent number: 12681877
    Abstract: A method for use in a storage processor, comprising: receiving an I/O request that is associated with a logical block address; allocating a cache slot that corresponds to the logical block address, wherein allocating the cache slot includes: identifying a type of memory that is required to host the cache slot by using one or more configuration settings that are associated with the cache slot, identifying a cache slot that is both available and hosted in the identified type of memory, and assigning the identified cache slot to the logical block address; and executing the I/O request by using the allocated cache slot, wherein using the allocated cache slot includes identifying a memory address that is associated with the cache slot and executing at least one direct memory access (DMA) command that is associated with the allocated cache slot.
    Type: Grant
    Filed: March 28, 2024
    Date of Patent: July 14, 2026
    Assignee: Dell Products L.P.
    Inventors: Earl Medeiros, Ramesh Doddaiah
  • Patent number: 12681640
    Abstract: A method comprising: generating a write-on-write distribution for a plurality of data units in a data entity, the write-on-write distribution including a plurality of buckets, each bucket corresponding to a different write-on-write time range, each bucket having a respective bucket size that is based on a count of ones of the plurality of data units whose respective predicted write-on-write times fall within the bucket's write-on-write time range; identifying one or more utilization metrics of a storage system where the data entity is hosted; classifying a representative bucket size of the write-on-write distribution and the one or more utilization metrics with a machine learning model to predict a replication period for the data entity, the representative bucket size being a bucket size within a predetermined distance from a mean bucket size of the write-on-write distribution; and configuring the storage system to replicate the data entity in accordance with the replication period.
    Type: Grant
    Filed: April 11, 2024
    Date of Patent: July 14, 2026
    Assignee: Dell Products L.P.
    Inventors: Sandeep Chandrashekhara, Ramesh Doddaiah, Mohammed Aamir VT, Mohammed Asher