Patents by Inventor Ramesh Illikkal

Ramesh Illikkal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods and apparatuses for controlling thread contention
    Patent number: 10613876
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: April 7, 2020
    Assignee: Intel Corporation
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Methods And Apparatuses For Controlling Thread Contention
    Publication number: 20170351534
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Application
    Filed: June 22, 2017
    Publication date: December 7, 2017
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Methods and apparatuses for controlling thread contention
    Patent number: 9715397
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: July 25, 2017
    Assignee: Intel Corporation
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Methods And Apparatuses For Controlling Thread Contention
    Publication number: 20160077844
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Application
    Filed: November 20, 2015
    Publication date: March 17, 2016
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Methods and apparatuses for controlling thread contention
    Patent number: 9235256
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: January 12, 2016
    Assignee: Intel Corporation
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Methods and apparatuses for controlling thread contention
    Patent number: 9218046
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: December 22, 2015
    Assignee: Intel Corporation
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Methods And Apparatuses For Controlling Thread Contention
    Publication number: 20150095675
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Application
    Filed: December 9, 2014
    Publication date: April 2, 2015
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Methods and apparatuses for controlling thread contention
    Patent number: 8924748
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: December 30, 2014
    Assignee: Intel Corporation
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Methods And Apparatuses For Controlling Thread Contention
    Publication number: 20140215240
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Application
    Filed: March 27, 2014
    Publication date: July 31, 2014
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Methods and apparatuses for controlling thread contention
    Patent number: 8775834
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: July 8, 2014
    Assignee: Intel Corporation
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Methods and apparatuses for controlling thread contention
    Patent number: 8738942
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: May 27, 2014
    Assignee: Intel Corporation
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Methods And Apparatuses For Controlling Thread Contention
    Publication number: 20140115259
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Application
    Filed: December 27, 2013
    Publication date: April 24, 2014
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Methods and apparatuses for controlling thread contention
    Patent number: 8645728
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: February 4, 2014
    Assignee: Intel Corporation
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Methods and Apparatuses for Controlling Thread Contention
    Publication number: 20130191666
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Application
    Filed: March 8, 2013
    Publication date: July 25, 2013
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Methods And Apparatuses For Controlling Thread Contention
    Publication number: 20130132969
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Application
    Filed: December 20, 2012
    Publication date: May 23, 2013
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Methods And Apparatuses For Controlling Thread Contention
    Publication number: 20120221874
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Application
    Filed: May 2, 2012
    Publication date: August 30, 2012
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Methods and apparatuses for controlling thread contention
    Patent number: 8190930
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: May 29, 2012
    Assignee: Intel Corporation
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha
  • Applying quality of service (QoS) to a translation lookaside buffer (TLB)
    Patent number: 7921276
    Abstract: In one embodiment, the present invention includes a translation lookaside buffer (TLB) having storage locations each including a priority indicator field to store a priority level associated with an agent that requested storage of the data in the TLB, and an identifier field to store an identifier of the agent, where the TLB is apportioned according to a plurality of priority levels. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 21, 2007
    Date of Patent: April 5, 2011
    Assignee: Intel Corporation
    Inventors: Ramesh Illikkal, Hari Kannan, Ravishankar Iyer, Donald Newell, Jaideep Moses, Li Zhao
  • Providing quality of service (QoS) for cache architectures using priority information
    Patent number: 7899994
    Abstract: In one embodiment, the present invention includes a method for associating a first priority indicator with first data stored in a first entry of a cache memory to indicate a priority level of the first data, and updating a count value associated with the first priority indicator. The count value may then be used in determining an appropriate cache line for eviction. Other embodiments are described and claimed.
    Type: Grant
    Filed: August 14, 2006
    Date of Patent: March 1, 2011
    Assignee: Intel Corporation
    Inventors: Li Zhao, Ravishankar Iyer, Ramesh Illikkal, Srihari Makineni, Donald Newell
  • METHODS AND APPARATUSES FOR CONTROLLING THREAD CONTENTION
    Publication number: 20100250998
    Abstract: An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold.
    Type: Application
    Filed: March 30, 2009
    Publication date: September 30, 2010
    Inventors: Andrew Herdrich, Ramesh Illikkal, Donald Newell, Ravishankar Iyer, Vineet Chadha