Patents by Inventor Ramesh Padmanabhan
Ramesh Padmanabhan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8340109Abstract: A network device includes an interface (105), a TCP/IP protocol fast processing path (115), and a TCP/IP protocol slow processing path (110). The interface (105) receives a packet and parses the packets to determine a characteristic of the packet. The TCP/IP protocol fast processing path (115) processes the packet if the characteristic of the packet includes a first characteristic. The TCP/IP protocol slow processing path (110) processes the packet if the characteristic of the packet includes a second characteristic.Type: GrantFiled: October 18, 2010Date of Patent: December 25, 2012Assignee: Juniper Networks, Inc.Inventors: Nhon T Quach, Ramesh Padmanabhan, Jean Marc Frailong
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Patent number: 7986717Abstract: A transmitting system inserts runt abort packets in an outgoing data stream during idle time inter-frame time fill. The runt abort packets cause the receiving system to synchronize itself to the transmitting system so that even if an error during inter-frame time fill causes the receiving system to go into an erroneous state, the receiving system will be synchronized with the transmitting system before receiving valid data. In one embodiment, the transmitting system transmits data in packets over SONET. The packet data is scrambled at the transmitting end and descrambled at the receiving end. Runt abort packets sent during inter-frame time fill resynchronize the descrambler. If there is an error in the inter-frame time fill bytes, causing the receiving end descrambler to no longer be synchronized with the transmitting end scrambler, the runt abort packets will cause the descrambler to resynchronize state with the transmitting scrambler.Type: GrantFiled: June 26, 2009Date of Patent: July 26, 2011Assignee: Juniper Networks, Inc.Inventors: Dennis C. Ferguson, Devereaux C. Chen, Eric M. Verwillow, Ramesh Padmanabhan, Thomas Michael Skibo
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Publication number: 20110032941Abstract: A network device includes an interface (105), a TCP/IP protocol fast processing path (115), and a TCP/IP protocol slow processing path (110). The interface (105) receives a packet and parses the packets to determine a characteristic of the packet. The TCP/IP protocol fast processing path (115) processes the packet if the characteristic of the packet includes a first characteristic. The TCP/IP protocol slow processing path (110) processes the packet if the characteristic of the packet includes a second characteristic.Type: ApplicationFiled: October 18, 2010Publication date: February 10, 2011Applicant: JUNIPER NETWORKS, INC.Inventors: Nhon T. QUACH, Ramesh Padmanabhan, Jean Marc Frailong
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Patent number: 7839873Abstract: A network device includes an interface (105), a TCP/IP protocol fast processing path (115), and a TCP/IP protocol slow processing path (110). The interface (105) receives a packet and parses the packets to determine a characteristic of the packet. The TCP/IP protocol fast processing path (115) processes the packet if the characteristic of the packet includes a first characteristic. The TCP/IP protocol slow processing path (110) processes the packet if the characteristic of the packet includes a second characteristic.Type: GrantFiled: June 25, 2008Date of Patent: November 23, 2010Assignee: Juniper Networks, Inc.Inventors: Nhon T Quach, Ramesh Padmanabhan, Jean Marc Frailong
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Publication number: 20090257459Abstract: A transmitting system inserts runt abort packets in an outgoing data stream during idle time inter-frame time fill. The runt abort packets cause the receiving system to synchronize itself to the transmitting system so that even if an error during inter-frame time fill causes the receiving system to go into an erroneous state, the receiving system will be synchronized with the transmitting system before receiving valid data. In one embodiment, the transmitting system transmits data in packets over SONET, The packet data is scrambled at the transmitting end and descrambled at the receiving end. Runt abort packets. sent during inter-frame time fill resynchronize the descrambler. If there is an error in the inter-frame time fill bytes, causing the receiving end descrambler to no longer be synchronized with the transmitting end scrambler, the runt abort packets will cause the descrambler to resynchronize state with the transmitting scrambler.Type: ApplicationFiled: June 26, 2009Publication date: October 15, 2009Applicant: JUNIPER NETWORKS, INC.Inventors: Dennis C. FERGUSON, Devereaux C. CHEN, Eric M. VERWILLOW, Ramesh PADMANABHAN, Thomas Michael SKIBO
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Patent number: 7570667Abstract: A transmitting system inserts runt abort packets in an outgoing data stream during idle time inter-frame time fill. The runt abort packets cause the receiving system to synchronize itself to the transmitting system so that even if an error during inter-frame time fill causes the receiving system to go into an erroneous state, the receiving system will be synchronized with the transmitting system before receiving valid data. In one embodiment, the transmitting system transmits data in packets over SONET. The packet data is scrambled at the transmitting end and descrambled at the receiving end. Runt abort packets sent during inter-frame time fill resynchronize the descrambler. If there is an error in the inter-frame time fill bytes, causing the receiving end descrambler to no longer be synchronized with the transmitting end scrambler, the runt abort packets will cause the descrambler to resynchronize state with the transmitting scrambler.Type: GrantFiled: July 13, 2006Date of Patent: August 4, 2009Assignee: Juniper Networks, Inc.Inventors: Dennis C. Ferguson, Devereaux C. Chen, Eric M. Verwillow, Ramesh Padmanabhan, Thomas Michael Skibo
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Patent number: 7406087Abstract: A network device includes an interface (105), a TCP/IP protocol fast processing path (115), and a TCP/IP protocol slow processing path (110). The interface (105) receives a packet and parses the packets to determine a characteristic of the packet. The TCP/IP protocol fast processing path (115) processes the packet if the characteristic of the packet includes a first characteristic. The TCP/IP protocol slow processing path (110) processes the packet if the characteristic of the packet includes a second characteristic.Type: GrantFiled: November 8, 2002Date of Patent: July 29, 2008Assignee: Juniper Networks, Inc.Inventors: Nhon T. Quach, Ramesh Padmanabhan, Jean Marc Frailong
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Patent number: 7164698Abstract: Systems and methods, consistent with the present invention, provide a high-speed line interface for networking devices. Such an interface may be used in networking devices, such as routers and switches, for receiving data from, and transmitting data to, high-speed links, such as those lines carrying data at rates of 2.5 Gbit/sec, 10 Gbit/sec, and 40 Gbit/sec and more. In a preferred embodiment, the interface deserializes data from an incoming data stream onto a multi-line bus so that the data may be processed at a lower clock speed. Packets are extracted from the data on the multi-line bus and distributed among a plurality of switching/forwarding modules for processing.Type: GrantFiled: January 3, 2001Date of Patent: January 16, 2007Assignee: Juniper Networks, Inc.Inventors: Ashok Krishnamurthi, Jeffrey Scott Dredge, Ramesh Padmanabhan, Ramalingam K. Anand
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Patent number: 7099352Abstract: A transmitting system inserts runt abort packets in an outgoing data stream during idle time inter-frame time fill. The runt abort packets cause the receiving system to synchronize itself to the transmitting system so that even if an error during inter-frame time fill causes the receiving system to go into an erroneous state, the receiving system will be synchronized with the transmitting system before receiving valid data. In one embodiment, the transmitting system transmits data in packets over SONET. The packet data is scrambled at the transmitting end and descrambled at the receiving end. Runt abort packets sent during inter-frame time fill resynchronize the descrambler. If there is an error in the inter-frame time fill bytes, causing the receiving end descrambler to no longer be synchronized with the transmitting end scrambler, the runt abort packets will cause the descrambler to resynchronize state with the transmitting scrambler.Type: GrantFiled: January 3, 2001Date of Patent: August 29, 2006Assignee: Juniper Networks, Inc.Inventors: Dennis C. Ferguson, Devereaux C. Chen, Eric M. Verwillow, Ramesh Padmanabhan, Thomas Michael Skibo
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Patent number: 6907541Abstract: A system for reliably receiving data includes a memory, write logic, and read logic. The write logic receives data and an unreliable clock signal and writes the data to the memory using the unreliable clock signal. The read logic generates a gapped clock signal and reads the data from the memory using the gapped clock signal. The read logic generates the gapped clock signal by turning on and off a constant local clock signal.Type: GrantFiled: November 7, 2000Date of Patent: June 14, 2005Assignee: Juniper Networks, Inc.Inventors: Ramesh Padmanabhan, Pradeep Sindhu, Eric M. Verwillow
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Patent number: 6810501Abstract: A system updates a cyclic redundancy check (CRC) value. The system receives data containing an arbitrary number of valid and invalid portions. The valid portions are positioned adjacent to one another. The system also receives a signal representing a quantity of valid portions in the data and a current CRC value. The system updates the current CRC value using the data and signal in a single clock cycle.Type: GrantFiled: January 3, 2001Date of Patent: October 26, 2004Assignee: Juniper Networks, Inc.Inventors: Dennis C. Ferguson, Devereaux C. Chen, Ramesh Padmanabhan, Chang-Hong Wu, Thomas Michael Skibo
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Patent number: 6567902Abstract: A data packing system includes a source memory, a destination memory, and a data packer. The source memory stores data in source storage locations. The data includes valid data and invalid data. The destination memory stores at least some of the data from the source memory in destination storage locations. The destination memory stores the valid data in contiguous ones of the destination storage locations. The data packer transmits the valid data from the source storage locations to the contiguous destination storage locations.Type: GrantFiled: August 15, 2000Date of Patent: May 20, 2003Assignee: Juniper Networks. Inc.Inventors: Ramesh Padmanabhan, Dev Chen
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Patent number: 5604866Abstract: A system and method for controlling the flow of messages transferred between modules of a computer system is disclosed. The system includes a receiver module comprising a buffer having a capacity to store a predetermined number of messages, and a transmitter module coupled to the receiver module. The transmitter module includes a counter for maintaining a count value representative of free space in the buffer. The transmitter module transmits a message to the buffer when the count value is greater than zero. Then, the transmitter module decrements the count value by a value characteristic of the transmitted message, such that the count value is updated to be representative of free space in the buffer after transmission of the message to the buffer.Type: GrantFiled: September 30, 1993Date of Patent: February 18, 1997Assignee: Silicon Graphics, Inc.Inventors: Ronald L. Kolb, Ramesh Padmanabhan, Eric M. Williams