Patents by Inventor Ramesh Singh

Ramesh Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070085580
    Abstract: A delay locked loop (DLL) circuit in which situations of lock to multiple periods of a reference signal is determined by a lock detector using dummy delay elements and a duty cycle correction circuit (DCC). The lock detector, the dummy delay elements and the delay control circuit are used in a path parallel to the delay elements which generate the desired delayed signals having different delays in relation to the reference signal. Due to the use of the parallel path, the throughput performance of the DLL circuit is not impeded. In an embodiment, separate charge pumps are used by a phase comparator and the lock detector used in the parallel path.
    Type: Application
    Filed: October 14, 2005
    Publication date: April 19, 2007
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ramesh Singh, Visvesvaraya Pentakota, Abhaya Kumar, Chun Lee
  • Patent number: 7023372
    Abstract: A switched-capacitor circuit for use in analog-to-digital conversion samples an input signal with respect to a reference voltage such that it significantly reduces a DAC settling time interval during each bit trial. In one exemplary embodiment, the switched-capacitor circuit having first and second groups of capacitor banks is coupled to a first input of a comparator and to a control circuit which provides control signals such that during a switching sequence, an equal value of capacitance is selected from each of the first and second groups of capacitor banks to reduce the DAC settling time interval, thereby improving the conversion rate.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: April 4, 2006
    Assignee: Analog Devices, Inc.
    Inventors: Ramesh Singh, Eamonn Byrne, Asif Ahmad, Srikanth Nittala, Shubha Govindachar
  • Publication number: 20050234691
    Abstract: Crop yield may be assessed and predicted using a piecewise linear regression method with break point and various weather and agricultural parameters, such as NDVI, surface parameters (soil moisture and surface temperature) and rainfall data. These parameters may help aid in estimating and predicting crop conditions. The overall crop production environment can include inherent sources of heterogeneity and their nonlinear behavior. A non-linear multivariate optimization method may be used to derive an empirical crop yield prediction equation. Quasi-Newton method may be used in optimization for minimizing inconsistencies and errors in yield prediction. Minimization of least square loss function through iterative convergence of pre-defined empirical equation can be based on piecewise linear regression method with break point. This non-linear method can achieve acceptable lower residual values with predicted values very close to the observed values.
    Type: Application
    Filed: April 19, 2005
    Publication date: October 20, 2005
    Inventors: Ramesh Singh, Anup Prasad, Vinod Tare, Menas Kafatos
  • Publication number: 20050229508
    Abstract: The present invention introduces an innovative data mining technique to identify precursory signals associated with earthquakes. It involves a multistrategy approach that employs one-dimensional wavelet transformations to identify singularities in data, and analyzes the continuity of wavelet maxima in time and space to determine the singularities that could be precursory signals. Surface Latent Heat Flux (SLHF) data may be used. A single prominent SLHF anomaly may be found to be associated some days prior to a main earthquake event.
    Type: Application
    Filed: April 18, 2005
    Publication date: October 20, 2005
    Inventors: Guido Cervone, Menas Kafatos, Domenico Napoletani, Ramesh Singh