Patents by Inventor Ramesha Doddamane

Ramesha Doddamane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7945823
    Abstract: A built-in self-test (BIST) circuit for testing addressable locations can include a BIST generator (202) that can generate test addresses for testing each addressable location. Defective addresses can be stored in a fault address store (216). An address range selector circuit (230) can limit the range of addresses generated by an address generator (234). Once defective addresses for a first range have been detected, an address range selector circuit (230) can test another range. An entire address range can thus be tested regardless of the depth of a fault address store (216).
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: May 17, 2011
    Assignee: Netlogic Microsystems, Inc.
    Inventors: Ramesha Doddamane, Eswar Vadlamani, Gopalakrishnan Perur Krishnan, Tarjinder Singh
  • Publication number: 20070271482
    Abstract: A built-in self-test (BIST) circuit for testing addressable locations can include a BIST generator (202) that can generate test addresses for testing each addressable location. Defective addresses can be stored in a fault address store (216). An address range selector circuit (230) can limit the range of addresses generated by an address generator (234). Once defective addresses for a first range have been detected, an address range selector circuit (230) can test another range. An entire address range can thus be tested regardless of the depth of a fault address store (216).
    Type: Application
    Filed: March 2, 2007
    Publication date: November 22, 2007
    Inventors: Ramesha Doddamane, Eswar Vadlamani, Gopalakrishnan Krishnan, Tarjinder Singh