Patents by Inventor Rami Awad

Rami Awad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12065532
    Abstract: The invention relates to a water-dispersible polyurethane (meth)acrylate U substantially synthesised from at least one multifunctional aromatic or (cyclo)aliphatic isocyanate I, at least one (cyclo)aliphatic diol H2 having a number of carbon atoms of from two to twenty, at least one (cyclo)aliphatic triol H3 having a number of carbon atoms of from three to twenty, an aliphatic hydroxyacid A having at least two carbon atoms, at least one hydroxyl group, and at least one acid group which may be a carboxyl group, a sulfonic acid group, or a phosphoric or phosphonic acid group, and at least one component R having at least one isocyanate-reactive group and at least one radically polymerisable olefinically unsaturated group, at least one base B for at least partial neutralisation of the acid groups of component A, and a catalyst C for urethane formation which is a salt or a chelate complex of a metal of any of groups 3 to 15 of the Periodic System of the Elements, to a process for its preparation, and to the use th
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: August 20, 2024
    Assignee: MIWON AUSTRIA FORSCHUNG UND ENTWICKLUNG GMBH
    Inventors: Rami Awad, Paul-Lukas Awad
  • Publication number: 20240146269
    Abstract: A differential all-pass coupling circuit with common mode feedback is disclosed. An example apparatus includes an anti-aliasing circuit configured to reduce a bandwidth of a first differential signal, and a switched-capacitor circuit coupled to the anti-aliasing circuit configured to control a first switch to charge a capacitor to a first voltage based on a first difference between (i) a common mode input voltage associated with a first common mode voltage of the first differential signal and (ii) a common mode reference voltage associated with a second common mode voltage of an input stage of the receiver, control a second switch to provide a second voltage to the capacitor based on a second difference between the first differential signal and the common mode input voltage, and output a second differential signal to the input stage based on the first differential signal adjusted by the second voltage.
    Type: Application
    Filed: September 28, 2023
    Publication date: May 2, 2024
    Applicant: MediaTek Inc.
    Inventors: Ahmed Othman Mohamed Mohamed ElShater, Ramy Awad, Tamer Mohammed Ali
  • Patent number: 11890432
    Abstract: A deflectable vascular catheter includes a proximal handle assembly, an elongated sheath extending distally from the proximal handle assembly and including a deflectable distal end portion, an actuation mechanism operatively associated within an interior cavity of the proximal handle assembly for deflecting the distal end portion of the sheath, an anchor ring located at a distal end of the deflectable distal end portion of the sheath, and a pull wire extending from the actuation mechanism to the anchor ring. The pull wire has a non-circular cross-section and is laser welded to an exterior surface of the anchoring ring.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: February 6, 2024
    Assignee: Oscor Inc.
    Inventors: Ramy Awad, Thomas P. Osypka
  • Patent number: 11552830
    Abstract: A low power receiver having a feedforward equalization, FFE, based continuous time linear equalizer, CTLE. The FFE CTLE comprises: an input for receiving an input signal; a main first path operably coupled to the input and comprising a source-follower transistor arranged to apply a scaling factor to the received input signal; a second path operably coupled to the input and comprising a delay arranged to apply a delay to the received input signal and a common source transistor common source transistor arranged to apply a scaling factor to the received delayed input signal, wherein the source-follower transistor and the common source, CS, transistor are connected as a single SF-CS stage whose output is arranged to subtract the output of the common source transistor from an output of the source-follower transistor.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: January 10, 2023
    Assignee: MediaTek Singapore Pte. Ltd
    Inventors: Ahmed Othman Mohamed ElShater, Ramy Awad, Tamer Mohammed Ali
  • Patent number: 11469729
    Abstract: A receiver front-end includes a first variable-gain amplifier that performs attenuation; a continuous time linear equalizer coupled to the input or output of the first variable-gain amplifier, wherein a combination of the first variable-gain amplifier and the continuous time linear equalizer produces a processed signal; a plurality of track-and-hold circuits that sample the processed signal in an interleaved manner; and a plurality of second variable-gain amplifiers receiving input signals from the plurality of track-and-hold circuits respectively.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: October 11, 2022
    Assignee: MEDIATEK Singapore Pte. Ltd.
    Inventors: Ramy Awad, Tamer Mohammed Ali, E-Hung Chen, Miguel Francisco Gandara
  • Publication number: 20220103400
    Abstract: A low power receiver having a feedforward equalization, FFE, based continuous time linear equalizer, CTLE. The FFE CTLE comprises: an input for receiving an input signal; a main first path operably coupled to the input and comprising a source-follower transistor arranged to apply a scaling factor to the received input signal; a second path operably coupled to the input and comprising a delay arranged to apply a delay to the received input signal and a common source transistor common source transistor arranged to apply a scaling factor to the received delayed input signal, wherein the source-follower transistor and the common source, CS, transistor are connected as a single SF-CS stage whose output is arranged to subtract the output of the common source transistor from an output of the source-follower transistor.
    Type: Application
    Filed: September 23, 2021
    Publication date: March 31, 2022
    Inventors: Ahmed Othman Mohamed ElShater, Ramy Awad, Tamer Mohammed Ali
  • Publication number: 20210379334
    Abstract: A deflectable vascular catheter is disclosed which includes a proximal handle assembly, an elongated sheath extending distally from the proximal handle assembly and including a deflectable distal end portion, an actuation mechanism operatively associated within an interior cavity of the proximal handle assembly for deflecting the distal end portion of the sheath, an anchor ring located at a distal end of the deflectable distal end portion of the sheath, and a pull wire extending from the actuation mechanism to the anchor ring, wherein the pull wire has a non-circular cross-section and is laser welded to an exterior surface of the anchoring ring.
    Type: Application
    Filed: June 8, 2021
    Publication date: December 9, 2021
    Applicant: Oscor Inc.
    Inventors: Ramy Awad, Thomas P. Osypka
  • Publication number: 20210292466
    Abstract: The invention relates to a water-dispersible polyurethane (meth)acrylate U substantially synthesised from at least one multifunctional aromatic or (cyclo)aliphatic isocyanate I, at least one (cyclo)aliphatic diol H2 having a number of carbon atoms of from two to twenty, at least one (cyclo)aliphatic triol H3 having a number of carbon atoms of from three to twenty, an aliphatic hydroxyacid A having at least two carbon atoms, at least one hydroxyl group, and at least one acid group which may be a carboxyl group, a sulfonic acid group, or a phosphoric or phosphonic acid group, and at least one component R having at least one isocyanate-reactive group and at least one radically polymerisable olefinically unsaturated group, at least one base B for at least partial neutralisation of the acid groups of component A, and a catalyst C for urethane formation which is a salt or a chelate complex of a metal of any of groups 3 to 15 of the Periodic System of the Elements, to a process for its preparation, and to the use th
    Type: Application
    Filed: July 15, 2019
    Publication date: September 23, 2021
    Inventors: Rami AWAD, Paul-Lukas AWAD
  • Publication number: 20200395909
    Abstract: A receiver front-end includes a first variable-gain amplifier that performs attenuation; a continuous time linear equalizer coupled to the input or output of the first variable-gain amplifier, wherein a combination of the first variable-gain amplifier and the continuous time linear equalizer produces a processed signal; a plurality of track-and-hold circuits that sample the processed signal in an interleaved manner; and a plurality of second variable-gain amplifiers receiving input signals from the plurality of track-and-hold circuits respectively.
    Type: Application
    Filed: May 11, 2020
    Publication date: December 17, 2020
    Applicant: MEDIATEK Singapore Pte. Ltd
    Inventors: Ramy Awad, Tamer Mohammed Ali, E-Hung Chen, Miguel Francisco Gandara
  • Patent number: 10734958
    Abstract: A line receiver is described. The line receiver may be configured to receive signals transmitted via a communication channel, such as a metal trace on a printed circuit board or a cable. The receiver may comprise a buffer and circuitry for enhancing the trans-conductance gain of the buffer. By enhancing the trans-conductance gain of the buffer, linearity may be improved and susceptibility to process and temperature variations may be limited. Enhancement of the trans-conductance gain may be performed using feedback circuitry coupled to the buffer. The receiver may further comprise mirror circuitry configured to provide a desired current to the load. The receiver may further comprise a gain stage for setting the gain of the receiver to a desired level.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: August 4, 2020
    Assignee: MediaTek Inc.
    Inventors: Ramy Awad, Tamer Ali
  • Patent number: 10333394
    Abstract: A line receiver comprising a switched capacitor circuit and a buffer is described. The buffer may be configured to receive, through the switched capacitor circuit, an analog signal. In response, the buffer may provide an output signal to a load, such as an analog-to-digital converter. The switched capacitor circuit may be controlled by a control circuitry, and may charge at least one capacitive element to a desired reference voltage. The reference voltage may be selected so as to bias the buffer with a desired DC current, and consequently, to provide a desired degree if linearity. The line receiver may further comprise a bias circuit configured to generate the reference voltage needed to bias the buffer with the desired DC current.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: June 25, 2019
    Assignee: MediaTek Inc.
    Inventor: Ramy Awad
  • Patent number: 10027341
    Abstract: A line receiver including an analog-to-digital converter is described. The line receiver may include an input stage, a first sampling stage, an integration stage, and a second sampling stage. The input stage may be configured to receive an input voltage representative of a signal transmitted by a transmitter, and to convert the input voltage to a current. The input stage may include a trans-conductance stage. The current may be sampled using the first sampling stage. The sampled current may be converted to a voltage using the integration stage. The integration stage may include a trans-impedance stage. The voltage obtained using the integration stage may be sampled using the second sampling stage.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: July 17, 2018
    Assignee: MediaTek Inc.
    Inventors: Ramy Awad, Tamer Ali
  • Publication number: 20180054210
    Abstract: A line receiver including an analog-to-digital converter is described. The line receiver may include an input stage, a first sampling stage, an integration stage, and a second sampling stage. The input stage may be configured to receive an input voltage representative of a signal transmitted by a transmitter, and to convert the input voltage to a current. The input stage may include a trans-conductance stage. The current may be sampled using the first sampling stage. The sampled current may be converted to a voltage using the integration stage. The integration stage may include a trans-impedance stage. The voltage obtained using the integration stage may be sampled using the second sampling stage.
    Type: Application
    Filed: February 15, 2017
    Publication date: February 22, 2018
    Inventors: Ramy Awad, Tamer Ali
  • Publication number: 20180048307
    Abstract: A line receiver is described. The line receiver may be configured to receive signals transmitted via a communication channel, such as a metal trace on a printed circuit board or a cable. The receiver may comprise a buffer and circuitry for enhancing the trans-conductance gain of the buffer. By enhancing the trans-conductance gain of the buffer, linearity may be improved and susceptibility to process and temperature variations may be limited. Enhancement of the trans-conductance gain may be performed using feedback circuitry coupled to the buffer. The receiver may further comprise mirror circuitry configured to provide a desired current to the load. The receiver may further comprise a gain stage for setting the gain of the receiver to a desired level.
    Type: Application
    Filed: February 15, 2017
    Publication date: February 15, 2018
    Applicant: MediaTek Inc.
    Inventors: Ramy Awad, Tamer Ali
  • Publication number: 20170331366
    Abstract: A line receiver comprising a switched capacitor circuit and a buffer is described. The buffer may be configured to receive, through the switched capacitor circuit, an analog signal. In response, the buffer may provide an output signal to a load, such as an analog-to-digital converter. The switched capacitor circuit may be controlled by a control circuitry, and may charge at least one capacitive element to a desired reference voltage. The reference voltage may be selected so as to bias the buffer with a desired DC current, and consequently, to provide a desired degree if linearity. The line receiver may further comprise a bias circuit configured to generate the reference voltage needed to bias the buffer with the desired DC current.
    Type: Application
    Filed: October 27, 2016
    Publication date: November 16, 2017
    Applicant: MediaTek Inc.
    Inventor: Ramy Awad
  • Patent number: 9325316
    Abstract: A low-power high-swing current-mode logic (CML) driver circuit includes a first differential-pair and a second differential-pair. The first differential-pair includes first transistors, and is coupled to a first voltage supply that supplies a first voltage. The second differential-pair includes second transistors, and a common node of the second differential-pair is coupled to a second voltage supply. The second voltage supply supplies a second voltage that is higher than the first voltage. Control terminals of the first transistors are coupled to control terminals of the second transistors to form input nodes of the driver circuit.
    Type: Grant
    Filed: May 11, 2015
    Date of Patent: April 26, 2016
    Assignee: Broadcom Corporation
    Inventors: Amr Amin Hafez Amin Abou-El-Sonoun, Ramy Awad, Mohammed Abdul-Latif, Adesh Garg, Henry Park, Anand Jitendra Vasani, Ullas Singh, Namik Kemal Kocaman, Afshin Momtaz
  • Patent number: 7553520
    Abstract: The invention relates to a process for preparing a coated metal sheet coil comprising the coating of the metal sheet with a curable composition comprising an (meth)acrylated oligomer which is the reaction product of a carboxyl functionalized polybutadiene comprising x equivalents of —COOH groups with (i) y equivalents of one or more (meth)acrylated monoepoxides or (ii) a mixture of z equivalents of one or more polyepoxides and at least (z?x) equivalents of an ?,?-unsaturated carboxylic acid; with z>x and y?x.
    Type: Grant
    Filed: October 11, 2007
    Date of Patent: June 30, 2009
    Assignee: Cytec Surface Specialties, S.A.
    Inventors: Isabelle Fallais, Thierry Randoux, Marc Heylen, Rami Awad, Kris Verschueren
  • Patent number: 7438954
    Abstract: The invention relates to a process for preparing a coated metal sheet coil comprising the coating of the metal sheet with a curable composition comprising an (meth)acrylated oligomer which is the reaction product of a carboxyl functionalized polybutadiene comprising x equivalents of —COOH groups with (i) y equivalents of one or more (meth)acrylated monoepoxides or (ii) a mixture of z equivalents of one or more polyepoxides and at least (z-x) equivalents of an ?,?-unsaturated carboxylic acid; with z>x and y?x.
    Type: Grant
    Filed: December 9, 2004
    Date of Patent: October 21, 2008
    Assignee: Cytec Surface Specialties, S.A.
    Inventors: Isabelle Fallais, Thierry Randoux, Marc Heylen, Rami Awad, Kris Verschueren
  • Publication number: 20080095949
    Abstract: The invention relates to a process for preparing a coated metal sheet coil comprising the coating of the metal sheet with a curable composition comprising an (meth)acrylated oligomer which is the reaction product of a carboxyl functionalized polybutadiene comprising x equivalents of —COOH groups with (i) y equivalents of one or more (meth)acrylated monoepoxides or (ii) a mixture of z equivalents of one or more polyepoxides and at least (z?x) equivalents of an ?,?-unsaturated carboxylic acid; with z>x and y?x.
    Type: Application
    Filed: October 11, 2007
    Publication date: April 24, 2008
    Inventors: Isabelle FALLAIS, Thierry RANDOUX, Marc HEYLEN, Rami AWAD, Kris VERSCHUEREN
  • Patent number: 7329128
    Abstract: A cable connector is provided having a plug and a receptacle. Magnets are arranged on the plug and receptacle such that the magnets attract each other when the plug and receptacle are in a mated position and repel each other when the plug and receptacle are a predetermined distance away from the mated position. A cable connection system is provided that includes an adapter for connecting the plug and receptacle when only one of the plug and receptacle include magnets.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: February 12, 2008
    Assignee: The General Electric Company
    Inventor: Ramy Awad