Patents by Inventor Ramil A. Viluan
Ramil A. Viluan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7462943Abstract: A semiconductor device with a chip (505), its position defining a plane, and an insulating substrate (503) with first and second surfaces; the substrate is substantially coplanar with the chip, without warpage. One of the chip sides is attached to the first substrate surface using adhesive material (504), which has a thickness. The thickness of the adhesive material is distributed so that the thickness (504b) under the central chip area is equal to or smaller than the material thickness (504a) under the peripheral chip areas. Encapsulation compound (701) is embedding all remaining chip sides and the portions of the first substrate surface, which are not involved in the chip attachment. When reflow elements (720) are attached to the substrate contact pads, they are substantially coplanar with the chip.Type: GrantFiled: June 13, 2007Date of Patent: December 9, 2008Assignee: Texas Instruments IncorporatedInventors: Patricio A Ancheta, Jr., Ramil A Viluan, James R. M. Baello, Elaine B Reyes
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Publication number: 20080142949Abstract: A semiconductor device with a chip (505), its position defining a plane, and an insulating substrate (503) with first and second surfaces; the substrate is substantially coplanar with the chip, without warpage. One of the chip sides is attached to the first substrate surface using adhesive material (504), which has a thickness. The thickness of the adhesive material is distributed so that the thickness (504b) under the central chip area is equal to or smaller than the material thickness (504a) under the peripheral chip areas. Encapsulation compound (701) is embedding all remaining chip sides and the portions of the first substrate surface, which are not involved in the chip attachment. When reflow elements (720) are attached to the substrate contact pads, they are substantially coplanar with the chip.Type: ApplicationFiled: June 13, 2007Publication date: June 19, 2008Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Patricio A. Ancheta, Ramil A. Viluan, James R. M. Baello, Elaine B. Reyes
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Patent number: 7326025Abstract: Disclosed herein is a warp detection system (200) for determining warping in a carrier (110) configured to carry substrates (120) for processing. In one embodiment, the system (200) includes a guide plate (210) configured to guide a path of the carrier (110) during the processing, where the guide plate (210) is positioned underneath the carrier (110). In addition, the system (220) includes a plurality of sensors (230) positioned within the guide plate (210), wherein each of the plurality of sensors (230) is configured to measure a distance of a respective area of the carrier (110) from the guide plate (210). Also in this embodiment, the system (200) includes a processing device (310) configured to receive the measured distances and determine warping in the carrier (110) based on differences between the measured distances.Type: GrantFiled: May 4, 2004Date of Patent: February 5, 2008Assignee: Texas Instruments IncorporatedInventors: Ramil A. Viluan, Raymond M. Partosa, Romulo D. Casallo, Jr., Melvin B. Alviar
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Patent number: 7244636Abstract: A semiconductor device with a chip (505), its position defining a plane, and an insulating substrate (503) with first and second surfaces; the substrate is substantially coplanar with the chip, without warpage. One of the chip sides is attached to the first substrate surface using adhesive material (504), which has a thickness. The thickness of the adhesive material is distributed so that the thickness (504b) under the central chip area is equal to or smaller than the material thickness (504a) under the peripheral chip areas. Encapsulation compound (701) is embedding all remaining chip sides and the portions of the first substrate surface, which are not involved in the chip attachment. When reflow elements (720) are attached to the substrate contact pads, they are substantially coplanar with the chip.Type: GrantFiled: October 19, 2005Date of Patent: July 17, 2007Assignee: Texas Instruments IncorporatedInventors: Patricio V. Ancheta, Jr., Ramil A. Viluan, James R. M. Baello, Elaine B. Reyes
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Publication number: 20070085171Abstract: A semiconductor device with a chip (505), its position defining a plane, and an insulating substrate (503) with first and second surfaces; the substrate is substantially coplanar with the chip, without warpage. One of the chip sides is attached to the first substrate surface using adhesive material (504), which has a thickness. The thickness of the adhesive material is distributed so that the thickness (504b) under the central chip area is equal to or smaller than the material thickness (504a) under the peripheral chip areas. Encapsulation compound (701) is embedding all remaining chip sides and the portions of the first substrate surface, which are not involved in the chip attachment. When reflow elements (720) are attached to the substrate contact pads, they are substantially coplanar with the chip.Type: ApplicationFiled: October 19, 2005Publication date: April 19, 2007Inventors: Patricio Ancheta, Ramil Viluan, James Baello, Elaine Reyes
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Publication number: 20050247541Abstract: Disclosed herein is a warp detection system (200) for determining warping in a carrier (110) configured to carry substrates (120) for processing. In one embodiment, the system (200) includes a guide plate (210) configured to guide a path of the carrier (110) during the processing, where the guide plate (210) is positioned underneath the carrier (110). In addition, the system (220) includes a plurality of sensors (230) positioned within the guide plate (210), wherein each of the plurality of sensors (230) is configured to measure a distance of a respective area of the carrier (110) from the guide plate (210). Also in this embodiment, the system (200) includes a processing device (310) configured to receive the measured distances and determine warping in the carrier (110) based on differences between the measured distances.Type: ApplicationFiled: May 4, 2004Publication date: November 10, 2005Inventors: Ramil Viluan, Raymond Partosa, Romulo Casallo, Melvin Alviar
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Patent number: 6688453Abstract: A conveyor system (30) comprises: a boat (20), a feed belt (36), a feed pulley (38), and improved railings (34). The boat (20) is adapted to carry a component or components, such as semiconductor chips (32), therein. The feed belt (36) is driven by the feed pulley (38). The feed belt (36) is adapted to move the boat (20) along the conveyor system (30). The improved railings (34) are adapted to retain the boat (20) and to define a path for the boat (20). A set of bearings (44) are coupled to each of the improved railings (34) in locations such that the boat (20) will contact the bearings (44) rather than the railings (34) for at least part of the path as the boat (20) moves along the conveyor system (30).Type: GrantFiled: December 27, 2001Date of Patent: February 10, 2004Assignee: Texas Instruments IncorporatedInventors: Melvin B. Alviar, Ramil A. Viluan
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Patent number: 6650011Abstract: A work station for a chip bonder, and/or for a wire bonder includes a clampless, porous ceramic vacuum chuck where the substrate under assembly is securely and uniformly held by vacuum applied through many tiny pores distributed across the work surface. Porous ceramic work stations are applicable to a family of packages, or to a substrate outline, and may include one or more chips within the same indexing operation. Reliability and yield of the assembled semiconductor devices is enhanced by avoiding uneven or warped substrates. In addition, the porous ceramic work holder provides a cost effective apparatus by eliminating device specific clamps and work holders, the time required for change-out and set-up.Type: GrantFiled: January 25, 2002Date of Patent: November 18, 2003Assignee: Texas Instruments IncorporatedInventors: Raymond M. Partosa, Allan C. Soriano, Enrique R. Ferrer, Jr., Ramil A. Viluan, Melvin B. Alviar, Jose Franco A. Alicante
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Publication number: 20030140470Abstract: A work station for a chip bonder, and/or for a wire bonder includes a clampless, porous ceramic vacuum chuck where the substrate under assembly is securely and uniformly held by vacuum applied through many tiny pores distributed across the work surface. Porous ceramic work stations are applicable to a family of packages, or to a substrate outline, and may include one or more chips within the same indexing operation. Reliability and yield of the assembled semiconductor devices is enhanced by avoiding uneven or warped substrates. In addition, the porous ceramic work holder provides a cost effective apparatus by eliminating device specific clamps and work holders, the time required for change-out and set-up.Type: ApplicationFiled: January 25, 2002Publication date: July 31, 2003Inventors: Raymond M. Partosa, Allan C. Soriano, Enrique R. Ferrer, Ramil A. Viluan, Melvin B. Alviar, Jose Franco A. Alicante
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Publication number: 20030121757Abstract: A conveyor system (30) comprises: a boat (20), a feed belt (36), a feed pulley (38), and improved railings (34). The boat (20) is adapted to carry a component or components, such as semiconductor chips (32), therein. The feed belt (36) is driven by the feed pulley (38). The feed belt (36) is adapted to move the boat (20) along the conveyor system (30). The improved railings (34) are adapted to retain the boat (20) and to define a path for the boat (20). A set of bearings (44) are coupled to each of the improved railings (34) in locations such that the boat (20) will contact the bearings (44) rather than the railings (34) for at least part of the path as the boat (20) moves along the conveyor system (30).Type: ApplicationFiled: December 27, 2001Publication date: July 3, 2003Inventors: Melvin B. Alviar, Ramil A. Viluan