Patents by Inventor Ramirez Xavier Veredas

Ramirez Xavier Veredas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory device and method providing logic connections for data transfer
    Patent number: 7940575
    Abstract: In an embodiment, a method for transferring data in a memory device is provided. The method may include transferring data from a first memory cell arrangement including a plurality of memory cells to a second memory cell arrangement including a plurality of memory cells via a connecting circuit arrangement coupled to the plurality of memory cell arrangements and providing a plurality of controllable connections via a plurality of connecting circuit terminals, the memory cell arrangements being connected with at least one connecting circuit terminal of the plurality of connecting circuit terminals, wherein the connecting circuit is configured to provide arbitrarily controllable signal flow connections between the plurality of connecting circuit terminals. The data are transferred via a logic connection using the controllable connections. Simultaneously, a further logic connection may be provided to a memory cell arrangement of the memory cell arrangements using the controllable connections.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: May 10, 2011
    Assignee: QIMONDA AG
    Inventors: Roberto Ravasio, Andreas Kux, Detlev Richter, Girolamo Gallo, Josef Willer, Ramirez Xavier Veredas
  • Integrated circuit having a memory cell arrangement and method for reading a memory cell state using a plurality of partial readings
    Patent number: 7800943
    Abstract: Embodiments of the invention relate generally to an integrated circuit having a memory cell arrangement and a method for reading a memory cell state using a plurality of partial readings. In an embodiment of the invention, an integrated circuit having a memory cell arrangement is provided.
    Type: Grant
    Filed: January 18, 2008
    Date of Patent: September 21, 2010
    Assignee: Qimonda AG
    Inventors: Roberto Ravasio, Detlev Richter, Gert Koebernik, Girolamo Gallo, Mirko Reissmann, Ramirez Xavier Veredas
  • Memory Device and Method Providing Logic Connections for Data Transfer
    Publication number: 20090244949
    Abstract: In an embodiment, a method for transferring data in a memory device is provided. The method may include transferring data from a first memory cell arrangement including a plurality of memory cells to a second memory cell arrangement including a plurality of memory cells via a connecting circuit arrangement coupled to the plurality of memory cell arrangements and providing a plurality of controllable connections via a plurality of connecting circuit terminals, the memory cell arrangements being connected with at least one connecting circuit terminal of the plurality of connecting circuit terminals, wherein the connecting circuit is configured to provide arbitrarily controllable signal flow connections between the plurality of connecting circuit terminals. The data are transferred via a logic connection using the controllable connections. Simultaneously, a further logic connection may be provided to a memory cell arrangement of the memory cell arrangements using the controllable connections.
    Type: Application
    Filed: March 28, 2008
    Publication date: October 1, 2009
    Inventors: Roberto Ravasio, Andreas Kux, Detlev Richter, Girolamo Gallo, Josef Willer, Ramirez Xavier Veredas
  • Integrated Circuit Having a Memory Cell Arrangement and Method for Reading a Memory Cell State Using a Plurality of Partial Readings
    Publication number: 20090185425
    Abstract: Embodiments of the invention relate generally to an integrated circuit having a memory cell arrangement and a method for reading a memory cell state using a plurality of partial readings. In an embodiment of the invention, an integrated circuit having a memory cell arrangement is provided.
    Type: Application
    Filed: January 18, 2008
    Publication date: July 23, 2009
    Inventors: Roberto Ravasio, Detlev Richter, Gert Koebernik, Girolamo Gallo, Mirko Reissmann, Ramirez Xavier Veredas