Patents by Inventor Ramkumar Sivakumar

Ramkumar Sivakumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12244138
    Abstract: A differential ESD circuit is provided for protecting a pair of differential terminals of an integrated circuit from electrostatic shock. A first diode couples between a first terminal in the pair of differential terminals and a first resistor that couples to a voltage node of the integrated circuit. Similarly, a second diode couples between a second terminal in the pair of differential terminals and a second resistor that couples to the voltage node of the integrated circuit. The first and second resistors isolate the first and second terminals from a capacitive loading that would otherwise exist from the first and second diodes.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: March 4, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Kshitij Yadav, Vijayakumar Dhanasekaran, Khaled Mahmoud Abdelfattah Aly, Ramkumar Sivakumar
  • Patent number: 12044712
    Abstract: A voltage comparator includes a boosting circuit that is configured to boost a direct current (DC) bias of the comparator. The boosting circuit includes transistors that are different in size, a larger one of the transistors being configured to add a portion of boosting current to a bias current.
    Type: Grant
    Filed: October 7, 2022
    Date of Patent: July 23, 2024
    Assignee: QUALCOMM INCORPORATED
    Inventor: Ramkumar Sivakumar
  • Publication number: 20240178662
    Abstract: A differential ESD circuit is provided for protecting a pair of differential terminals of an integrated circuit from electrostatic shock. A first diode couples between a first terminal in the pair of differential terminals and a first resistor that couples to a voltage node of the integrated circuit. Similarly, a second diode couples between a second terminal in the pair of differential terminals and a second resistor that couples to the voltage node of the integrated circuit. The first and second resistors isolate the first and second terminals from a capacitive loading that would otherwise exist from the first and second diodes.
    Type: Application
    Filed: November 28, 2022
    Publication date: May 30, 2024
    Inventors: Kshitij YADAV, Vijayakumar DHANASEKARAN, Khaled Mahmoud ABDELFATTAH ALY, Ramkumar SIVAKUMAR
  • Publication number: 20240176574
    Abstract: An integrated circuit is provided with a terminal that functions to pass a data signal during a high-speed data mode of operation and to pass an audio signal during an audio mode of operation. The integrated circuit includes an audio source that couples to the terminal through an audio pass transistor during the audio mode of operation. To maintain the audio pass transistor off during the high-speed data mode of operation, the integrated circuit includes a first transistor coupled between the terminal and a gate of the audio pass transistor. The first transistor conducts negative charge from the terminal to the gate of the audio pass transistor.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 30, 2024
    Inventors: Dongyang TANG, Ramkumar SIVAKUMAR, Khaled Mahmoud ABDELFATTAH ALY
  • Publication number: 20240178663
    Abstract: An ESD trigger circuit is provided for protecting a pass transistor coupled to an integrated circuit terminal. The integrated circuit terminal couples through a diode to a voltage node. In response to an electrostatic shock at the integrated circuit terminal, the diode conducts charge to the voltage node to pulse a voltage of the voltage node. The ESD trigger circuit responds to the pulse of the voltage by coupling the voltage node to a gate of the pass transistor.
    Type: Application
    Filed: November 28, 2022
    Publication date: May 30, 2024
    Inventors: Kshitij YADAV, Vijayakumar DHANASEKARAN, Khaled Mahmoud ABDELFATTAH ALY, Ramkumar SIVAKUMAR, Dongyang TANG, Chienchung YANG
  • Publication number: 20240162718
    Abstract: Circuits and methods for suppression of negative transient voltage may be implemented in systems that combine high-speed data, audio, and charging at a plug. The circuits and methods for suppression of the negative transient voltage may include a first diode and transistor coupled in series between a pin and ground, where the transistor is controlled by an output of a voltage comparator that is also coupled to the first pin. A negative transient voltage event may cause the comparator to activate the transistor to sink a current through the diode.
    Type: Application
    Filed: November 14, 2022
    Publication date: May 16, 2024
    Inventors: Vijayakumar DHANASEKARAN, Ramkumar SIVAKUMAR, Kshitij YADAV, Khaled Mahmoud ABDELFATTAH ALY
  • Publication number: 20240162874
    Abstract: A transmission line includes an equalization circuit. The equalization circuit is a second-order equalization circuit having a first loop at a gain element and a second loop at the gain element. The first loop may include a first compensation capacitor, and the second loop may include a second compensation capacitor and a resistor. The second order equalization circuit may allow for improved performance with respect to gain as well as reduced power usage.
    Type: Application
    Filed: November 16, 2022
    Publication date: May 16, 2024
    Inventors: Dongyang TANG, Ramkumar SIVAKUMAR, Khaled Mahmoud ABDELFATTAH ALY, Vijayakumar DHANASEKARAN
  • Publication number: 20240118320
    Abstract: A voltage comparator includes a boosting circuit that is configured to boost a direct current (DC) bias of the comparator. The boosting circuit includes transistors that are different in size, a larger one of the transistors being configured to add a portion of boosting current to a bias current.
    Type: Application
    Filed: October 7, 2022
    Publication date: April 11, 2024
    Inventor: Ramkumar SIVAKUMAR
  • Patent number: 11885836
    Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for voltage-to-current conversion. For example, certain aspects provide a circuit for signal amplification including a first amplifier; a first transistor, a gate of the first transistor being coupled to an output of the first amplifier and a drain of the first transistor being coupled to an output node of circuit; a first resistive element coupled between a first input node of the circuit and an input of the first amplifier; a second amplifier; a second transistor, a gate of the second transistor being coupled to an output of the second amplifier and a drain of the second transistor being coupled to the output node of circuit; and a second resistive element coupled between a second input node of the circuit and an input of the second amplifier.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: January 30, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Ramkumar Sivakumar, Jingxue Lu, Sherif Galal, Xinwang Zhang, Kshitij Yadav
  • Patent number: 11843320
    Abstract: A method for operating a resonant converter in a burst mode includes determining the polarity of a transformer voltage across a secondary winding of a transformer. The method includes determining, from the polarity of the transformer voltage, on/off states of first and second transistors coupled to the secondary winding of the transformer. If the transformer voltage has a first polarity, the method includes commencing a burst period by alternately turning on/off high-side and low-side transistors electrically connected to a primary winding of the transformer.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: December 12, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ramkumar Sivakumar, Brent Alan McDonald, Yalong Li
  • Patent number: 11799287
    Abstract: A trigger circuit includes a first capacitor and a second capacitor connected in series, a control device and an output of the trigger circuit. The first capacitor is connected to a first voltage rail and to a common node. The second capacitor is connected to a second voltage rail and to the common node. The control device has a first terminal that is coupled to the common node and a control terminal to receive a control signal. The control signal may be decoupled from transients on the first voltage rail and the second voltage rail. The output of the trigger circuit is coupled to the common node.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: October 24, 2023
    Assignee: QUALCOMM INCORPORATED
    Inventors: Ramkumar Sivakumar, Subbarao Surendra Chakkirala
  • Publication number: 20230148160
    Abstract: A trigger circuit includes a first capacitor and a second capacitor connected in series, a control device and an output of the trigger circuit. The first capacitor is connected to a first voltage rail and to a common node. The second capacitor is connected to a second voltage rail and to the common node. The control device has a first terminal that is coupled to the common node and a control terminal to receive a control signal. The control signal may be decoupled from transients on the first voltage rail and the second voltage rail. The output of the trigger circuit is coupled to the common node.
    Type: Application
    Filed: November 9, 2021
    Publication date: May 11, 2023
    Inventors: Ramkumar SIVAKUMAR, Subbarao Surendra CHAKKIRALA
  • Publication number: 20230137935
    Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for voltage-to-current conversion. For example, certain aspects provide a circuit for signal amplification including a first amplifier; a first transistor, a gate of the first transistor being coupled to an output of the first amplifier and a drain of the first transistor being coupled to an output node of circuit; a first resistive element coupled between a first input node of the circuit and an input of the first amplifier; a second amplifier; a second transistor, a gate of the second transistor being coupled to an output of the second amplifier and a drain of the second transistor being coupled to the output node of circuit; and a second resistive element coupled between a second input node of the circuit and an input of the second amplifier.
    Type: Application
    Filed: December 27, 2022
    Publication date: May 4, 2023
    Inventors: Ramkumar SIVAKUMAR, Jingxue LU, Sherif GALAL, Xinwang ZHANG, Kshitij YADAV
  • Publication number: 20220416676
    Abstract: A method for operating a resonant converter in a burst mode includes determining the polarity of a transformer voltage across a secondary winding of a transformer. The method includes determining, from the polarity of the transformer voltage, on/off states of first and second transistors coupled to the secondary winding of the transformer. If the transformer voltage has a first polarity, the method includes commencing a burst period by alternately turning on/off high-side and low-side transistors electrically connected to a primary winding of the transformer.
    Type: Application
    Filed: June 29, 2021
    Publication date: December 29, 2022
    Inventors: Ramkumar Sivakumar, Brent Alan McDonald, Yalong Li
  • Patent number: 11536749
    Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for voltage-to-current conversion. For example, certain aspects provide a circuit for signal amplification including a first amplifier; a first transistor, a gate of the first transistor being coupled to an output of the first amplifier and a drain of the first transistor being coupled to an output node of circuit; a first resistive element coupled between a first input node of the circuit and an input of the first amplifier; a second amplifier; a second transistor, a gate of the second transistor being coupled to an output of the second amplifier and a drain of the second transistor being coupled to the output node of circuit; and a second resistive element coupled between a second input node of the circuit and an input of the second amplifier.
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: December 27, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Ramkumar Sivakumar, Jingxue Lu, Sherif Galal, Xinwang Zhang, Kshitij Yadav
  • Patent number: 11424720
    Abstract: A power amplifier provides reduction of click and pop in audio applications. The power amplifier includes a first amplifier and an auxiliary amplifier. The auxiliary amplifier is used to ramp the power amplifier output from ground to an offset voltage to reduce the “click and pop” sound. The first amplifier and the auxiliary amplifier having a shared feedback loop. An output of the first amplifier and an output of the auxiliary amplifier may be switchably coupled to the shared feedback loop. A wave generator controls a switch to couple the first amplifier output or the auxiliary amplifier output to the shared feedback loop.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: August 23, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Pradeep Silva, Ramkumar Sivakumar, Qubo Zhou, Xinwang Zhang, Hanil Lee, Dongyang Tang, Vijayakumar Dhanasekaran
  • Publication number: 20210297046
    Abstract: A power amplifier provides reduction of click and pop in audio applications. The power amplifier includes a first amplifier and an auxiliary amplifier. The auxiliary amplifier is used to ramp the power amplifier output from ground to an offset voltage to reduce the “click and pop” sound. The first amplifier and the auxiliary amplifier having a shared feedback loop. An output of the first amplifier and an output of the auxiliary amplifier may be switchably coupled to the shared feedback loop. A wave generator controls a switch to couple the first amplifier output or the auxiliary amplifier output to the shared feedback loop.
    Type: Application
    Filed: March 23, 2020
    Publication date: September 23, 2021
    Inventors: Pradeep SILVA, Ramkumar SIVAKUMAR, Qubo ZHOU, Xinwang ZHANG, Hanil LEE, Dongyang TANG, Vijayakumar DHANASEKARAN
  • Publication number: 20210231710
    Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for voltage-to-current conversion. For example, certain aspects provide a circuit for signal amplification including a first amplifier; a first transistor, a gate of the first transistor being coupled to an output of the first amplifier and a drain of the first transistor being coupled to an output node of circuit; a first resistive element coupled between a first input node of the circuit and an input of the first amplifier; a second amplifier; a second transistor, a gate of the second transistor being coupled to an output of the second amplifier and a drain of the second transistor being coupled to the output node of circuit; and a second resistive element coupled between a second input node of the circuit and an input of the second amplifier.
    Type: Application
    Filed: January 21, 2021
    Publication date: July 29, 2021
    Inventors: Ramkumar SIVAKUMAR, Jingxue LU, Sherif GALAL, Xinwang ZHANG, Kshitij YADAV
  • Publication number: 20180374705
    Abstract: A transient signal protection circuit includes an input node coupled to a signal line configured to carry an output signal from a first circuit to a second circuit, wherein the signal line is subject to experiencing an unwanted reverse signal from the second circuit to the first circuit. The transient signal protection circuit also includes a comparator module configured to output a clamping signal when it is determined that the unwanted reverse signal includes a value that falls outside an acceptable range of the first circuit; and a power switch coupled to the comparator module and configured to couple the input node to a sink node when the comparator module outputs the clamping signal.
    Type: Application
    Filed: June 23, 2017
    Publication date: December 27, 2018
    Inventors: Vijayakumar Dhanasekaran, Ramkumar Sivakumar, Arash Mehrabi
  • Patent number: 9880631
    Abstract: Apparatus and methods to reduce effects of erratic motion input during operation of an instrument via a graphical user interface are described. Spatial motion input received from a user may be filtered using filter parameters obtained during a calibration procedure. The filtered motion input may be used to predict a trajectory of a cursor or object used to select an icon or text. The icon or text may be latched to the approaching cursor or object. The combination of motion smoothing and latching may improve ease-of-use of the graphical user interface for individuals having neuromuscular disorder, or users operating instruments in high-vibration environments.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: January 30, 2018
    Assignee: STMicroelectronics International N.V.
    Inventors: Prashant Pandey, Ramkumar Sivakumar