Patents by Inventor Ramon DE SOUZA SCHWARTZ

Ramon DE SOUZA SCHWARTZ has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10389734
    Abstract: A method and device for managing a communication message verification process in a communication system containing a plurality of nodes N1 to N9, including: a step of receiving one or more communication messages at a first node N1 of the communication system, from one or more nodes N2 to N9 adjacent to the first node N1; a step of executing a validity verification operation in relation to the one or more received communication messages; a step of determining a comprehensive verification rate parameter V_all indicating the number of validity verification operations executed per unit time at the first node N1; and a step of controlling the execution of the validity verification operations so that the comprehensive verification rate parameter V_all does not exceed a comprehensive verification rate threshold, for one or more additional communication messages from the nodes N2 to N9 adjacent to the first node N1.
    Type: Grant
    Filed: November 27, 2015
    Date of Patent: August 20, 2019
    Assignee: Hitachi Solutions, Ltd.
    Inventors: Ramon De Souza Schwartz, Andrea Tomatis
  • Publication number: 20170331836
    Abstract: A method and device for managing a communication message verification process in a communication system containing a plurality of nodes N1 to N9, including: a step of receiving one or more communication messages at a first node N1 of the communication system, from one or more nodes N2 to N9 adjacent to the first node N1; a step of executing a validity verification operation in relation to the one or more received communication messages; a step of determining a comprehensive verification rate parameter V_all indicating the number of validity verification operations executed per unit time at the first node N1; and a step of controlling the execution of the validity verification operations so that the comprehensive verification rate parameter V_all does not exceed a comprehensive verification rate threshold, for one or more additional communication messages from the nodes N2 to N9 adjacent to the first node N1.
    Type: Application
    Filed: November 27, 2015
    Publication date: November 16, 2017
    Applicant: Hitachi Solutions, Ltd.
    Inventors: Ramon DE SOUZA SCHWARTZ, Andrea TOMATIS