Patents by Inventor Ramon Olavarria

Ramon Olavarria has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230244215
    Abstract: A permission-engine computer system receives a request for electronic access by an equipment supplier to a manufacturing facility of a manufacturer to perform a remote support activity for equipment in the manufacturing facility. The permission-engine computer system routes the request to a plurality of predefined approvers and receives approval of the request from the plurality of predefined approvers. In response to receiving approval of the request from the plurality of predefined approvers, the permission-engine computer system signals a gateway computer system of the manufacturer that the request is approved. The gateway computer system automatically creates a connection between an electronic device in the manufacturing facility and a computer system of the equipment supplier in response to approval of the request. The connection is used for the remote support activity.
    Type: Application
    Filed: April 12, 2023
    Publication date: August 3, 2023
    Inventors: Michael Brain, Ramon Olavarria, Joseph Gutierrez, Ravi Bhagat, Assaf Kantorovich
  • Patent number: 11662716
    Abstract: In some embodiments, a method is performed at a computer system of a manufacturer. The manufacturer operates a manufacturing facility that includes equipment from an equipment supplier. In the method, a request is received for electronic access by the equipment supplier to the manufacturing facility to perform a remote support activity for the equipment. The request is routed to predefined approvers. Approval of the request is received from the predefined approvers. In response to receiving approval of the request from the predefined approvers, a connection is automatically created between an electronic device in the manufacturing facility and a computer system for the equipment supplier. The connection is used for the remote support activity. Upon completion of the remote support activity, the connection is automatically terminated.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: May 30, 2023
    Assignee: KLA Corporation
    Inventors: Michael Brain, Ramon Olavarria, Joseph Gutierrez, Ravi Bhagat, Assaf Kantorovich
  • Publication number: 20220276639
    Abstract: In some embodiments, a method is performed at a computer system of a manufacturer. The manufacturer operates a manufacturing facility that includes equipment from an equipment supplier. In the method, a request is received for electronic access by the equipment supplier to the manufacturing facility to perform a remote support activity for the equipment. The request is routed to predefined approvers. Approval of the request is received from the predefined approvers. In response to receiving approval of the request from the predefined approvers, a connection is automatically created between an electronic device in the manufacturing facility and a computer system for the equipment supplier. The connection is used for the remote support activity. Upon completion of the remote support activity, the connection is automatically terminated.
    Type: Application
    Filed: July 14, 2021
    Publication date: September 1, 2022
    Inventors: Michael Brain, Ramon Olavarria, Joseph Gutierrez, Ravi Bhagat, Assaf Kantorovich
  • Patent number: 10650508
    Abstract: Systems and methods for defection classification in a semiconductor process are provided. The system includes a communication line configured to receive a defect image of a wafer from the semiconductor process and a deep-architecture neural network in electronic communication with the communication line. The neural network has a first convolution layer of neurons configured to convolve pixels from the defect image with a filter to generate a first feature map. The neural network also includes a first subsampling layer configured to reduce the size and variation of the first feature map. A classifier is provided for determining a defect classification based on the feature map. The system may include more than one convolution layers and/or subsampling layers. A method includes extracting one or more features from a defect image using a deep-architecture neural network, for example a convolutional neural network.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: May 12, 2020
    Assignee: KLA-Tencor Corporation
    Inventors: Wei Chang, Ramon Olavarria, Krishna Rao
  • Patent number: 10545412
    Abstract: A method to collect data and train, validate and deploy statistical models to predict overlay errors using patterned wafer geometry data and other relevant information includes selecting a training wafer set, measuring at multiple lithography steps and calculating geometry differences, applying a plurality of predictive models to the training wafer geometry differences and comparing predicted overlay to the measured overlay on the training wafer set. The most accurate predictive model is identified and the results fed-forward to the lithography scanner tool which can correct for these effects and reduce overlay errors during the wafer scan-and-expose processes.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: January 28, 2020
    Assignee: KLA-Tencor Corporation
    Inventors: Wei Chang, Krishna Rao, Joseph Gutierrez, Ramon Olavarria, Craig MacNaughton, Amir Azordegan, Prasanna Dighe
  • Publication number: 20170017162
    Abstract: A method to collect data and train, validate and deploy statistical models to predict overlay errors using patterned wafer geometry data and other relevant information includes selecting a training wafer set, measuring at multiple lithography steps and calculating geometry differences, applying a plurality of predictive models to the training wafer geometry differences and comparing predicted overlay to the measured overlay on the training wafer set. The most accurate predictive model is identified and the results fed-forward to the lithography scanner tool which can correct for these effects and reduce overlay errors during the wafer scan-and-expose processes.
    Type: Application
    Filed: March 5, 2015
    Publication date: January 19, 2017
    Applicant: KLA-Tenor Corporation
    Inventors: Wei Chang, Krishna Rao, Joseph Gutierrez, Ramon Olavarria, Craig MacNaughton, Amir Azordegan, Prasanna Dighe
  • Publication number: 20160163035
    Abstract: Systems and methods for defection classification in a semiconductor process are provided. The system includes a communication line configured to receive a defect image of a wafer from the semiconductor process and a deep-architecture neural network in electronic communication with the communication line. The neural network has a first convolution layer of neurons configured to convolve pixels from the defect image with a filter to generate a first feature map. The neural network also includes a first subsampling layer configured to reduce the size and variation of the first feature map. A classifier is provided for determining a defect classification based on the feature map. The system may include more than one convolution layers and/or subsampling layers. A method includes extracting one or more features from a defect image using a deep-architecture neural network, for example a convolutional neural network.
    Type: Application
    Filed: December 1, 2015
    Publication date: June 9, 2016
    Inventors: Wei Chang, Ramon Olavarria, Krishna Rao
  • Patent number: 9087176
    Abstract: A method to collect data and train, validate and deploy statistical models to predict overlay errors using patterned wafer geometry data and other relevant information includes selecting a training wafer set, measuring at multiple lithography steps and calculating geometry differences, applying a plurality of predictive models to the training wafer geometry differences and comparing predicted overlay to the measured overlay on the training wafer set. The most accurate predictive model is identified and the results fed-forward to the lithography scanner tool which can correct for these effects and reduce overlay errors during the wafer scan-and-expose processes.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: July 21, 2015
    Assignee: KLA-Tencor Corporation
    Inventors: Wei Chang, Krishna Rao, Joseph Gutierrez, Ramon Olavarria, Craig Macnaughton, Amir Azordegan, Prasanna Dighe, Jaydeep Sinha