Abstract: When integrated circuit dice are tested as part of a completely manufactured wafer, the individual die is tested both for proper function and for speed grade. A wafer map is formed in a computer to keep up with which dice on the wafer are good and to record the speed grade of each good die. This wafer map is then used during the step of dicing and packaging the wafer to fill existing orders by placing a die that meets a speed grade of an order into the package that has been ordered. More than one kind of order can be filled from dice in a single wafer. The method allows integrated circuit devices to be packaged to order and eliminates the need to keep an inventory of packaged dice.