Patents by Inventor Ramon Sanchez
Ramon Sanchez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250211265Abstract: A method and apparatus configured for digital pre-distortion (DPD) adaptation. The apparatus may include DPD circuitry and DPD adaptation circuitry. The DPD circuitry is configured to process input data using a pre-distortion function to generate pre-processed input data that is to be subsequently processed by a non-linear system. The pre-distortion function is represented as a sum of a plurality of non-linear terms, and non-linear effects of the non-linear system are compensated by the DPD circuitry. The DPD adaptation circuitry is configured to adapt coefficients of the DPD circuitry based on feedback information derived from an output signal of the non-linear system. The DPD adaptation circuitry is configured to adapt the plurality of non-linear terms of the pre-distortion function one non-linear term at a time. The pre-distortion function may be evaluated using look-up tables (LUTs). The LUTs may be adapted one LUT at a time in a round robin fashion.Type: ApplicationFiled: December 20, 2023Publication date: June 26, 2025Inventors: Kameran AZADET, Ramon SANCHEZ, Hazar YUKSEL, Kannan RAJAMANI, Zoran ZIVKOVIC, Albert MOLINA
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Patent number: 12278649Abstract: A processing device is provided. The processing device comprises one or more interfaces configured to transmit information to a nonlinear device and processing circuitry configured to control the one or more interfaces and to. Further, the processing circuitry is configured to transmit an excitation signal to the nonlinear device and to receive response information from the nonlinear device. Further, the processing circuitry is configured to determine a linear response of the nonlinear device based on the response information and to determine a nonlinear response of the nonlinear device based on the determined linear response.Type: GrantFiled: June 25, 2021Date of Patent: April 15, 2025Assignee: Intel CorporationInventors: Ramon Sanchez, Kameran Azadet, Martin Clara, Daniel Gruber
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Patent number: 12273074Abstract: A system and method for digital correction for a dynamically varying non-linear system. The system includes a correction circuitry including at least one look-up table (LUT). The correction circuitry is configured to receive an input signal and modify the input signal to be processed by the non-linear system using at least one LUT to correct non-linearity incurred by the non-linear system. The at least one LUT is addressed by a magnitude or power of the input signal and a dynamically varying parameter associated with the input signal. The dynamically varying parameter may be one of average signal power of the input signal, a differential of the average power of the input signal, a directional beam index, or temperature.Type: GrantFiled: June 25, 2021Date of Patent: April 8, 2025Assignee: Intel CorporationInventors: Kameran Azadet, Marc Jan Georges Tiebout, Ramon Sanchez, Hazar Yuksel
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Patent number: 12034450Abstract: An apparatus for correcting a mismatch between a first segment and a second segment of a Digital-to-Analog Converter, DAC, is provided. The first segment generates a first contribution to an analog output signal of the DAC based on a first number of bits of a digital input word for the DAC converter, and the second segment generates a second contribution based on a second number of bits. Further, the apparatus comprises a first processing circuit for the first number of bits comprising a first filter configured to modify the first number of bits to generate first modified bits, and a second processing circuit comprising a second filter to modify the second number of bits to generate second modified bits. The apparatus additionally comprises an output configured to output a modified digital input word for the DAC, which is based on the first modified bits and the second modified bits.Type: GrantFiled: December 27, 2019Date of Patent: July 9, 2024Assignee: Intel CorporationInventors: Daniel Gruber, Ramon Sanchez, Kameran Azadet, Martin Clara
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Patent number: 11658672Abstract: A digital predistortion system and method for pre-distorting an input to a non-linear system. The digital predistortion system includes a digital predistortion circuit and a memory. The digital predistortion circuit is configured to receive input data and modify the input data using at least one look-up table. The at least one look-up table is addressed by a signed real value of the input data. The memory is configured to store the at least one look-up table. The at least one look-up table is implemented based on a generalized memory polynomial model.Type: GrantFiled: November 17, 2021Date of Patent: May 23, 2023Assignee: Intel CorporationInventors: Ramon Sanchez, Kameran Azadet
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Publication number: 20220416807Abstract: A processing device is provided. The processing device comprises one or more interfaces configured to transmit information to a nonlinear device and processing circuitry configured to control the one or more interfaces and to. Further, the processing circuitry is configured to transmit an excitation signal to the nonlinear device and to receive response information from the nonlinear device. Further, the processing circuitry is configured to determine a linear response of the nonlinear device based on the response information and to determine a nonlinear response of the nonlinear device based on the determined linear response.Type: ApplicationFiled: June 25, 2021Publication date: December 29, 2022Inventors: Ramon SANCHEZ, Kameran AZADET, Martin CLARA, Daniel GRUBER
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Publication number: 20220416729Abstract: A system and method for digital correction for a dynamically varying non-linear system. The system includes a correction circuitry including at least one look-up table (LUT). The correction circuitry is configured to receive an input signal and modify the input signal to be processed by the non-linear system using at least one LUT to correct non-linearity incurred by the non-linear system. The at least one LUT is addressed by a magnitude or power of the input signal and a dynamically varying parameter associated with the input signal. The dynamically varying parameter may be one of average signal power of the input signal, a differential of the average power of the input signal, a directional beam index, or temperature.Type: ApplicationFiled: June 25, 2021Publication date: December 29, 2022Inventors: Kameran AZADET, Marc Jan Georges TIEBOUT, Ramon SANCHEZ, Hazar YUKSEL
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Publication number: 20220345143Abstract: An apparatus for correcting a mismatch between a first segment and a second segment of a Digital-to-Analog Converter, DAC, is provided. The first segment generates a first contribution to an analog output signal of the DAC based on a first number of bits of a digital input word for the DAC converter, and the second segment generates a second contribution to the analog output signal based on a second number of bits of the digital input word. The apparatus comprises an input configured to receive the digital input word. Further, the apparatus comprises a first processing circuit for the first number of bits comprising a first filter configured to modify the first number of bits in order to generate first modified bits, and a second processing circuit for the second number of bits comprising a second filter configured to modify the second number of bits in order to generate second modified bits. The apparatus additionally comprises an output configured to output a modified digital input word for the DAC.Type: ApplicationFiled: December 27, 2019Publication date: October 27, 2022Inventors: Daniel GRUBER, Ramon SANCHEZ, Kameran AZADET, Martin CLARA
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Publication number: 20220200618Abstract: A digital predistortion system and method for pre-distorting an input to a non-linear system. The digital predistortion system includes a digital predistortion circuit and a memory. The digital predistortion circuit is configured to receive input data and modify the input data using at least one look-up table. The at least one look-up table is addressed by a signed real value of the input data. The memory is configured to store the at least one look-up table. The at least one look-up table is implemented based on a generalized memory polynomial model.Type: ApplicationFiled: November 17, 2021Publication date: June 23, 2022Inventors: Ramon SANCHEZ, Kameran AZADET
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Publication number: 20220200643Abstract: A method and system for digital feed-forward linearization. The system includes a main transmit path and an auxiliary transmit path. The main transmit path includes circuitries configured to process a transmit signal for transmission. The main transmit path includes a power amplifier (PA) for amplifying the transmit signal. The auxiliary transmit path includes circuitries configured to generate, in a digital domain, a distortion error signal corresponding to a distortion introduced to the transmit signal due to a non-linear characteristics of the PA in the main transmit path and convert the distortion error signal to an analog distortion error signal. The analog distortion error signal is combined with an output of the PA in the main transmit path. The auxiliary transmit path comprises a PA model circuit that mimics the behavior of the PA to generate a distorted transmit signal in a digital domain.Type: ApplicationFiled: December 23, 2020Publication date: June 23, 2022Inventors: Ramon SANCHEZ, Kameran AZADET
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Patent number: 11239866Abstract: A digital-to-analog conversion system is provided. The digital-to-analog conversion system includes a digital-to-analog converter configured to receive a pre-distorted digital signal from a digital circuit, and to generate an analog signal based on the pre-distorted digital signal. Further, the digital-to-analog conversion system includes a feedback loop for providing a digital feedback signal to the digital circuit. The feedback loop includes an analog-to-digital converter configured to generate the digital feedback signal based on the analog signal, and wherein a sample rate of the analog-to-digital converter is lower than a sample rate of the digital-to-analog converter.Type: GrantFiled: July 9, 2020Date of Patent: February 1, 2022Assignee: Intel CorporationInventors: Daniel Gruber, Ramon Sanchez, Kameran Azadet, Martin Clara
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Patent number: 11171663Abstract: A digital-to-analog converter is provided. The digital-to-analog converter includes a first plurality of digital-to-analog converter cells configured to generate a first analog signal. Further, digital-to-analog converter includes a second plurality of digital-to-analog converter cells configured to generate a second analog signal. The first analog signal and the second analog signal form a differential signal pair. Further, the digital-to-analog converter includes a transmission line transformer comprising a first input node coupled to the first plurality of digital-to-analog converter cells, a second input node coupled to the second plurality of digital-to-analog converter cells, and a first output node. The transmission line transformer is configured to present a first impedance at the first and second input nodes and to present a second impedance at the first output node.Type: GrantFiled: March 30, 2020Date of Patent: November 9, 2021Assignee: Intel CorporationInventors: Daniel Gruber, Ramon Sanchez, Kameran Azadet, Martin Clara
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Patent number: 11038516Abstract: An apparatus and method for analog-to-digital conversion. The apparatus includes a first analog-to-digital converter (ADC), a second ADC, and a calibration unit. The first ADC is configured to sample an input analog signal at a first sampling frequency. The second ADC is configured to sample the input analog signal at a second sampling frequency. The second sampling frequency is a fraction of the first sampling frequency. The calibration unit is configured to correct a distortion incurred in an output of the first ADC based on an output of the second ADC. The first ADC may be a time-interleaved ADC. The second ADC may be an extra sub-ADC of the time-interleaved ADC. The second ADC may be configured to sample the input analog signal at random sampling phases. A dithering noise may be added to the input analog signal of the second ADC. The calibration unit may be a non-linear equalizer.Type: GrantFiled: May 29, 2020Date of Patent: June 15, 2021Assignee: Intel CorporationInventors: Kameran Azadet, Ramon Sanchez, Albert Molina, Martin Clara, Daniel Gruber, Matteo Camponeschi
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Patent number: 10938404Abstract: A digital-to-analog converter is provided. The digital-to-analog converter comprises an input configured to receiving a first digital control code for controlling a plurality of digital-to-analog converter cells. Further, the digital-to-analog converter comprises a code converter circuit configured to converter the first digital control code to a second digital control code. Further, the digital-to-analog converter comprises a shift code generation circuit configured to generate a shift code based on a code difference between the first digital control code and a third digital control code. The digital-to-analog converter additionally comprises a bit-shifter circuit configured to bit-shift the second digital control code based on the shift code in order to obtain a modified second digital control code.Type: GrantFiled: December 27, 2019Date of Patent: March 2, 2021Assignee: Intel CorporationInventors: Ramon Sanchez, Kameran Azadet, Martin Clara, Daniel Gruber
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Publication number: 20210050870Abstract: A digital-to-analog conversion system is provided. The digital-to-analog conversion system includes a digital-to-analog converter configured to receive a pre-distorted digital signal from a digital circuit, and to generate an analog signal based on the pre-distorted digital signal. Further, the digital-to-analog conversion system includes a feedback loop for providing a digital feedback signal to the digital circuit. The feedback loop includes an analog-to-digital converter configured to generate the digital feedback signal based on the analog signal, and wherein a sample rate of the analog-to-digital converter is lower than a sample rate of the digital-to-analog converter.Type: ApplicationFiled: July 9, 2020Publication date: February 18, 2021Inventors: Daniel GRUBER, Ramon SANCHEZ, Kameran AZADET, Martin CLARA
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Publication number: 20200366310Abstract: A digital-to-analog converter is provided. The digital-to-analog converter includes a first plurality of digital-to-analog converter cells configured to generate a first analog signal. Further, digital-to-analog converter includes a second plurality of digital-to-analog converter cells configured to generate a second analog signal. The first analog signal and the second analog signal form a differential signal pair. Further, the digital-to-analog converter includes a transmission line transformer comprising a first input node coupled to the first plurality of digital-to-analog converter cells, a second input node coupled to the second plurality of digital-to-analog converter cells, and a first output node. The transmission line transformer is configured to present a first impedance at the first and second input nodes and to present a second impedance at the first output node.Type: ApplicationFiled: March 30, 2020Publication date: November 19, 2020Inventors: Daniel GRUBER, Ramon SANCHEZ, Kameran AZADET, Martin CLARA
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Patent number: 10715185Abstract: A digital-to-analog conversion system is provided. The digital-to-analog conversion system includes a digital-to-analog converter configured to receive a pre-distorted digital signal from a digital circuit, and to generate an analog signal based on the pre-distorted digital signal. Further, the digital-to-analog conversion system includes a feedback loop for providing a digital feedback signal to the digital circuit. The feedback loop includes an analog-to-digital converter configured to generate the digital feedback signal based on the analog signal, and wherein a sample rate of the analog-to-digital converter is lower than a sample rate of the digital-to-analog converter.Type: GrantFiled: March 29, 2019Date of Patent: July 14, 2020Assignee: Intel CorporationInventors: Daniel Gruber, Ramon Sanchez, Kameran Azadet, Martin Clara
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Patent number: 10608661Abstract: A digital-to-analog converter is provided. The digital-to-analog converter includes a first plurality of digital-to-analog converter cells configured to generate a first analog signal. Further, digital-to-analog converter includes a second plurality of digital-to-analog converter cells configured to generate a second analog signal. The first analog signal and the second analog signal form a differential signal pair. Further, the digital-to-analog converter includes a transmission line transformer comprising a first input node coupled to the first plurality of digital-to-analog converter cells, a second input node coupled to the second plurality of digital-to-analog converter cells, and a first output node. The transmission line transformer is configured to present a first impedance at the first and second input nodes and to present a second impedance at the first output node.Type: GrantFiled: March 29, 2019Date of Patent: March 31, 2020Assignee: Intel CorporationInventors: Daniel Gruber, Ramon Sanchez, Kameran Azadet, Martin Clara
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Patent number: 10364955Abstract: An illumination module for a motor vehicle that includes at least one organic electroluminescent diode capable of being received in a support equipped with means for connecting same to a device for supplying electrical power and/or controlling a lighting and/or signaling assembly of the vehicle. The support has at least one connection bar formed in a flexible base material impregnated with conducting material, arranged in layers.Type: GrantFiled: July 7, 2017Date of Patent: July 30, 2019Assignee: VALEO ILUMINACIONInventors: Juan-Antonio Rubia, Leandro Rodriguez, Ramon Sanchez, Juan-Francisco Moreno, Damien Cabanne, Ricardo Fernandez, Eric Moisy
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Patent number: 10358079Abstract: A support for at least one illumination means for a motor vehicle that includes a base for securing to a structural element of the vehicle and at least one support module configured in order to form a housing for receiving said illumination means. At least a part of the support module is produced from a transparent or translucent material.Type: GrantFiled: July 7, 2017Date of Patent: July 23, 2019Assignee: VALEO ILUMINACIONInventors: Juan-Antonio Rubia, Leandro Rodriguez, Ramon Sanchez, Juan-Francisco Moreno, Damien Cabanne, Ricardo Fernandez, Eric Moisy