Patents by Inventor Ramtilak Vemu

Ramtilak Vemu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7861116
    Abstract: A method, apparatus and system for accepting a plurality of user-selected properties pre-designated for detecting errors in portions of a circuit, accepting a plurality of user-selected erroneous outputs, each of which may correspond to one of the plurality of user-selected set of properties, executing a simulation of the circuit for each of the plurality of user-selected properties, detecting in the output of the simulation, one of the plurality of user-selected erroneous outputs of the circuit for the corresponding one of the plurality of user-selected properties, and performing error correction on the circuit for the corresponding one of the plurality of user-selected properties. A method, apparatus and system for automatically selecting a subset of a set of inputs which when input into a circuit simulation generate erroneous output data to a primary output of the circuit and performing error correction on the circuit therewith. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: December 28, 2010
    Assignee: Intel Corporation
    Inventors: Abhijit Jas, Srinivas Patil, Rajesh Galivanche, Ramtilak Vemu
  • Publication number: 20090328211
    Abstract: Provided are methods and systems for control flow deviation detection. Provided are methods for software security, comprising executing a software program, generating a run-time signature variable, updating the run-time signature variable as the software program executes, comparing the run-time signature variable with a pre-computed signature, and detecting a deviation in control flow of the software program based on the comparison between the run-time signature variable and the pre-computed signature.
    Type: Application
    Filed: June 15, 2009
    Publication date: December 31, 2009
    Inventors: Jacob A. Abraham, Ramtilak Vemu
  • Publication number: 20090172529
    Abstract: A method, apparatus and system for accepting a plurality of user-selected properties pre-designated for detecting errors in portions of a circuit, accepting a plurality of user-selected erroneous outputs, each of which may correspond to one of the plurality of user-selected set of properties, executing a simulation of the circuit for each of the plurality of user-selected properties, detecting in the output of the simulation, one of the plurality of user-selected erroneous outputs of the circuit for the corresponding one of the plurality of user-selected properties, and performing error correction on the circuit for the corresponding one of the plurality of user-selected properties. A method, apparatus and system for automatically selecting a subset of a set of inputs which when input into a circuit simulation generate erroneous output data to a primary output of the circuit and performing error correction on the circuit therewith. Other embodiments are described and claimed.
    Type: Application
    Filed: December 31, 2007
    Publication date: July 2, 2009
    Inventors: Abhijit Jas, Srinivas Patil, Rajesh Galivanche, Ramtilak Vemu