Patents by Inventor Ran Ye

Ran Ye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11981976
    Abstract: Disclosed is a method for purifying a nickel-cobalt-manganese leaching solution.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: May 14, 2024
    Assignees: GUANGDONG BRUNP RECYCLING TECHNOLOGY CO., LTD., HUNAN BRUNP RECYCLING TECHNOLOGY CO., LTD., HUNAN BRUNP VEHICLES RECYCLING CO., LTD.
    Inventors: Ran He, Honghui Tang, Minjie Ye, Dongren Lyu, Bo Liu, Changdong Li
  • Publication number: 20240118385
    Abstract: A data processing method is provided, which can be applied to calculating a histogram of a preset data sequence. Each piece of data in the preset data sequence comprises an exponential part and a mantissa part. The method comprises: performing normalization processing on the preset data sequence to obtain a first index and a first mantissa of each data; according to the first index and the first mantissa of each data, generating a register address; and according to the register address, adjusting a numerical value in the corresponding register. The data processing method provided by the disclosure can be used in the process of statistical sorting of fixed point non-negative real number data such as ADC sampling data, floating point non-negative real number data such as two-dimensional FFT power data, and other types of data.
    Type: Application
    Filed: December 21, 2023
    Publication date: April 11, 2024
    Applicant: CALTERAH SEMICONDUCTOR TECHNOLOGY (SHANGHAI) CO., LTD
    Inventors: Ran TANG, Jingcheng YE, Yan ZHU
  • Publication number: 20240100672
    Abstract: A nail gun includes: a housing; an accessory box for accommodating a fastener and at least partially connected to the housing; and a power output portion for outputting a striking force to the fastener; and an operating member triggered to have at least a first position and a second position, where the nail gun has a maximum desired penetration depth when the operating member is operated to the first position, and the nail gun has a minimum desired penetration depth when the operating member is operated to the second position; and when the operating member switches from the first position to the second position, an angle by which the operating member rotates about a first straight line is less than or equal to 360°.
    Type: Application
    Filed: August 21, 2023
    Publication date: March 28, 2024
    Inventors: Junjie Ye, Jie Jiang, Ran Lan
  • Patent number: 11926982
    Abstract: An assembled subway station and a construction method thereof are provided. The assembled subway station includes a plurality of components combined in a ring shape, comprising a bottom plate component, two bottom corner components, two side wall components, a middle plate component, two top corner components, and a top plate component. Connection surfaces of each component are each provided with a concave-convex structure being matched with another concave-convex structure on a relevant connection surface of an adjacent component. Butt joint positions of two adjacent components are filled with sealing structures. The embedded grooves of two adjacent components are oppositely arranged, and connecting members for exerting opposite fastening forces on the two adjacent components are installed in the oppositely arranged embedded grooves.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: March 12, 2024
    Assignee: Guangzhou Metro Design & Research Institute Co., Ltd.
    Inventors: Xianli Ding, Bao Xiang, Xingzhong Nong, Juyang Wu, Haiou Shi, Feiqi Ou, Zihui Zan, Ran Wang, Shengya He, Xiao Li, Chunjie Liu, Liang Ye, Qian Zhou, Hengyi Li, Wenqi Zhang, Yiheng Ren, He Huang
  • Patent number: 11894458
    Abstract: A lateral double-diffused metal oxide semiconductor field effect transistor (LDMOS), including: a trench gate including a lower part inside a trench and an upper part outside the trench, a length of the lower part in a width direction of a conducting channel being less than that of the upper part, and the lower part extending into a body region and having a depth less than that of the body region; an insulation structure arranged between a drain region and the trench gate and extending downwards into a drift region, a depth of the insulation structure being less than that of the drift region.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: February 6, 2024
    Assignees: SOUTHEAST UNIVERSITY, CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: Jiaxing Wei, Qichao Wang, Kui Xiao, Dejin Wang, Li Lu, Ling Yang, Ran Ye, Siyang Liu, Weifeng Sun, Longxing Shi
  • Publication number: 20230019004
    Abstract: A lateral double-diffused metal oxide semiconductor field effect transistor (LDMOS), including: a trench gate including a lower part inside a trench and an upper part outside the trench, a length of the lower part in a width direction of a conducting channel being less than that of the upper part, and the lower part extending into a body region and having a depth less than that of the body region; an insulation structure arranged between a drain region and the trench gate and extending downwards into a drift region, a depth of the insulation structure being less than that of the drift region.
    Type: Application
    Filed: September 25, 2020
    Publication date: January 19, 2023
    Inventors: Jiaxing WEI, Qichao WANG, Kui XIAO, Dejin WANG, Li LU, Ling YANG, Ran YE, Siyang LIU, Weifeng SUN, Longxing SHI
  • Publication number: 20180060220
    Abstract: Techniques are provided for creating mock responses based on default data and mapping actual requests to those mock responses so that a service under test (SUT) may be executed within a simulated integration. In one technique, multiple example requests (ERs) that exemplify actual requests that the SUT may send during a test case are created. Each ER is configured to invoke a downstream service. For each ER, a mock downstream response that is based on default values is created. In a mapping, an association between each ER and its mock downstream response is stored. During the test, the SUT is invoked. Responsively, the SUT generates downstream requests to downstream services, regardless of actual availability. The computer intercepts each invocation of a downstream request. Based on the downstream request, the computer selects a mock downstream response from the mapping and provides the mock downstream response to the SUT.
    Type: Application
    Filed: August 23, 2016
    Publication date: March 1, 2018
    Inventors: YIDA YAO, Weizhen Wang, Ran Ye, Vakwadi Thejaswini Holla